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Description: SPI总线硬件描述语言Verilog下的实现,含主模式和从模式的实现,经过仿真验证,可作为一个单独的模块使用-SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses
Platform: |
Size: 5120 |
Author: 高兵 |
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Description: this the SPI slave module -this is the SPI slave module
Platform: |
Size: 2782208 |
Author: David |
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