Location:
Search - verilog rom
Search list
Description: 用FPGA开发板控制VGA显示,以800*600的分辨率,首先在屏幕的正中央依次出现“新”“年”“快”“乐”四个汉字,并分别移动到屏幕的四个角落,接着在屏幕中部从左至右依次出现“Happy New Year”英文字样,然后出现三个由小到大再消失的圆形图标模拟烟花,最后在黑屏中闪烁金星。字体均采用不同颜色,增添喜庆气氛。
本代码是练习VGA控制,ROM调用,时序控制及状态机运用的一个综合实例!
Platform: |
Size: 11611 |
Author: hangman_102@126.com |
Hits:
Description: verilog hdl 快速入门,里面包含很多有用的硬件描述语言的程序-Verilog HDL Quick Start, which contains many useful hardware description language procedures
Platform: |
Size: 371712 |
Author: guo |
Hits:
Description: 本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子,这些例子全部通过了验证。第七章以后的设计实例,不仅有Verilog-HDL的例子,也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。
-the CD-ROM include "Verilog-HDL Practice and Application System Design," a book the whole Examples of these examples were passed certification. After the seventh chapter, a design example is not only Verilog-HDL example, the report include VB, VC and other source files, even DLL generator also described in detail.
Platform: |
Size: 784384 |
Author: 东子 |
Hits:
Description: Read-only memory,Verilog code
Platform: |
Size: 8192 |
Author: leigh lee |
Hits:
Description: 一个 16×8bit 的ROM程序包括程序的初始化。-A 16 × 8bit the ROM initialization procedures, including procedures.
Platform: |
Size: 3072 |
Author: h13978699183 |
Hits:
Description: alteral FPGA VERILOG 利用 ROM DCFIFO 和RAM
实现高速到低速时钟域的数据传输 ,值得学习。-alteral FPGA VERILOG using ROM DCFIFO and RAM to realize high-speed low-speed clock domain data transfer, it is worth learning.
Platform: |
Size: 928768 |
Author: alison |
Hits:
Description: 我用VHDL写的正弦,用FPGA内部ROM,有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates
Platform: |
Size: 651264 |
Author: jimmy |
Hits:
Description: 《Verilog-HDL实践与应用系统设计》一书中的光盘源文件- Verilog-HDL practice and application of system design, a book on CD-ROM source file
Platform: |
Size: 771072 |
Author: 范田田 |
Hits:
Description: verilogA的教材,详细的介绍了语言的用法,主要是用于模拟电路系统建模和仿真。-verilogA materials, detail the usage of the language was mainly used to simulate the circuit system modeling and simulation.
Platform: |
Size: 1020928 |
Author: 赵晓迪 |
Hits:
Description: 《数字信号处理的FPGA实现》(第二版)光盘verilog代码-" The FPGA digital signal processing to achieve" (second edition) CD-ROM code verilog
Platform: |
Size: 330752 |
Author: 王昊 |
Hits:
Description: rom vector table vhdl and Testbench
Platform: |
Size: 172032 |
Author: KoBin |
Hits:
Description: Verilog hdl code for representing ram and rom "memory" using many methods
Platform: |
Size: 5120 |
Author: Muftah |
Hits:
Description: Rom的读取的Verilog代码,自己编写的,大家参考参考啊-Rom read the Verilog code, I have written, your information ah
Platform: |
Size: 1024 |
Author: keke |
Hits:
Description: 基于Verilog语言编写的各种只读存储器rom和随机存储器ram-Verilog language based on a variety of read-only memory rom and random access memory ram
Platform: |
Size: 704512 |
Author: 李辽原 |
Hits:
Description: verilog实现的8阶伪随机序列发生器,文件包含了三种主要模块:控制模块,ROM模块,线性反馈移位寄存器(LFSR)模块。已经通过modelsim仿真验证。-verilog to achieve 8-order pseudo-random sequence generator, the file contains three main modules: control module, ROM modules, a linear feedback shift register (LFSR) module. Has passed modelsim simulation.
Platform: |
Size: 870400 |
Author: 风影 |
Hits:
Description: 基于verilog的rom存储器 简单实用 初学者的好材料-Rom memory, based on simple and practical verilog' s good material for beginners
Platform: |
Size: 445440 |
Author: majianbiao |
Hits:
Description: Verilog ROM Source code
Platform: |
Size: 11264 |
Author: jc |
Hits:
Description: ROM的VERILOG实现,非常不错-ROM of the VERILOG achieve very good ~ ~
Platform: |
Size: 373760 |
Author: 侯勇 |
Hits:
Description: Verilog sine的查找表,相信大家会用到-Verilog sine lookup table, I believe we will use
Platform: |
Size: 3072 |
Author: wuzhongpeng |
Hits:
Description: verilog 编写的rom代码,开发环境为quartus-rom write verilog code development environment for quartus
Platform: |
Size: 97280 |
Author: li |
Hits: