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Description: encode.v The encoder
syndrome.v Syndrome generator in decoder
berlekamp.v Berlekamp algorithm in decoder
chien-search.v Chien search and Forney algorithm in decoder
decode.v The top module of the decoder
inverse.v Computes multiplication inverse of an Galois field element
test-bench.v The test fixture, and some brief notes on using the modules.
data-rom.v A simple data source for testing
run For those intelligence-challenged who can t run verilog
LGPL The license
-encode.v syndrome.v Syndrome generator in decoder al berlekamp.v Berlekamp gorithm in decoder chien - search.v Chien searc h and Forney in decoder algorithm decode.v The t op module of the decoder inverse.v Computes intercommunication tiplication inverse of an element over Galois field test-bench.v The test fixture. and some brief notes on using the modules. data - rom.v A simple data source for testing run For th PNA intelligence-challenged who can not run veri The log LGPL license
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Size: 44917 |
Author: zs8292 |
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Description: encode.v The encoder
syndrome.v Syndrome generator in decoder
berlekamp.v Berlekamp algorithm in decoder
chien-search.v Chien search and Forney algorithm in decoder
decode.v The top module of the decoder
inverse.v Computes multiplication inverse of an Galois field element
test-bench.v The test fixture, and some brief notes on using the modules.
data-rom.v A simple data source for testing
run For those intelligence-challenged who can t run verilog
LGPL The license
-encode.v syndrome.v Syndrome generator in decoder al berlekamp.v Berlekamp gorithm in decoder chien- search.v Chien searc h and Forney in decoder algorithm decode.v The t op module of the decoder inverse.v Computes intercommunication tiplication inverse of an element over Galois field test-bench.v The test fixture. and some brief notes on using the modules. data- rom.v A simple data source for testing run For th PNA intelligence-challenged who can not run veri The log LGPL license
Platform: |
Size: 45056 |
Author: zs8292 |
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Description: 里面是一个FIR滤波器的VHDL语言 具体的功能里面有详细的介绍 对毕业设计者很有帮助的 -There is a FIR filter VHDL language specific features which are detailed introduction to the graduate designers helpful
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Size: 4096 |
Author: 丛宇 |
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Description: Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
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Size: 2929664 |
Author: eknngx |
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Description: ldpc verilog 程序 做ldpc硬件实现的可以-ldpc verilog procedures do LDPC hardware implementation can
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Size: 9216 |
Author: nzh |
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Description: Verilog 黄金参考指南是 Veri log 硬件描述语言及其语法 语义 合并以及将它应用到硬件设计的一个
简明的快速参考指南-Verilog Golden Reference Guide is Veri log hardware description language and its syntax and semantics of merging hardware design to apply it to a concise Quick Reference Guide
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Size: 468992 |
Author: 李明 |
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Description: 浮点数 log运算模块 verilog语言编写 可直接调用-Log floating point arithmetic module can directly call verilog language
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Size: 1223680 |
Author: linyi |
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Description: Verilog扫盲文,初学Verilog的同学可以参考一下,帮助理解,属于入门级的参考书籍-log text literacy, beginner Verilog students can refer to, to help understand, entry-level reference books
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Size: 3339264 |
Author: hmyang2006 |
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Description: 使用cordic方法计算log,verilog语言实现(Calculate log, verilog language using cordic method)
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Size: 2301952 |
Author: 罗十一 |
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