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[OtherVerilog-r2-wangzhengxiong

Description: 学些verilog语言的入门书籍,由汪正雄编写,内容挺全的,可以作为初学者的手册。-up some Verilog language entry books, prepared by Hongzhengxiong, as Ting-wide and can serve as a beginner's manual.
Platform: | Size: 401408 | Author: | Hits:

[VHDL-FPGA-VerilogSPI_Code(Verilog)

Description: SPI总线硬件描述语言Verilog下的实现,含主模式和从模式的实现,经过仿真验证,可作为一个单独的模块使用-SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses
Platform: | Size: 5120 | Author: 高兵 | Hits:

[VHDL-FPGA-Verilogverilog

Description: 北大微电子学系于敦山老师的课件,介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容-Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed
Platform: | Size: 1550336 | Author: 唐进 | Hits:

[VHDL-FPGA-VerilogVerilog[lattice]

Description: 这是一有很好价值的verilog教程,本人就因此获意非浅,再次贡献给大家,希望大家有所帮助.-This is a very good value Verilog tutorial, I am going to be intended to greatly therefore, contribute to the U.S. again, I hope everybody help.
Platform: | Size: 143360 | Author: ixia | Hits:

[VHDL-FPGA-Verilogverilog

Description: 有例程和VERILONG语言的描述,可能对初学者有用.如果谁有好的VERILONG自己写的程序,请大家上传一些,借鉴一下-Have routines and VERILONG description language may be useful for beginners. If good VERILONG who write their own procedures, please upload some U.S. learn from you
Platform: | Size: 113664 | Author: | Hits:

[VHDL-FPGA-Verilogverilog

Description: 这是一个用verilog语言设计的数字频率及的源代码,上传一下,供大家研究 -This is a design using Verilog language and the digital frequency of the source code, upload click for U.S. research
Platform: | Size: 427008 | Author: bbbbbbbb | Hits:

[Embeded-SCM Develop105230308VerilogHDLcoding

Description: verilog的非常好的材料,是verilogHDL编码风格的总结。-Verilog s very good material is a summary of verilogHDL coding style.
Platform: | Size: 221184 | Author: liujakie | Hits:

[VHDL-FPGA-VerilogVDHL

Description: Verilog的135个经典设计实例,直流电机控制,游戏机,三态总线,加法器,锁存器等-Verilog s 135 classic design example, DC motor control, video game consoles, three-state bus, adder, latches, etc.
Platform: | Size: 113664 | Author: 何柳 | Hits:

[Booksverilog

Description: verilog(一大牛写的)个人感觉很适合初学者使用,讲解比较详细-verilog [a cow' s Writing] personal feeling is very suitable for beginners to use, explain in more detail
Platform: | Size: 496640 | Author: yu binbin | Hits:

[OtherVerilog

Description: verilog的简要教程 基本逻辑门,例如a n d、o r和n a n d等都内置在语言中。 • 用户定义原语( U D P)创建的灵活性。用户定义的原语既可以是组合逻辑原语,也可以 是时序逻辑原语。 • 开关级基本结构模型,例如p m o s 和n m o s等也被内置在语言中。-Verilog tutorial briefly the basic logic gates, such as and, or and NAND are built in the language. • user-defined primitives (UDP) to create flexibility. User-defined primitives are the combinational logic can be the original language may also be a temporal logic primitives. • The basic structure of switch-level models, such as PMOS and NMOS are also being built in the language.
Platform: | Size: 4169728 | Author: 阿春 | Hits:

[Communication-Mobileverilog

Description: 采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
Platform: | Size: 103424 | Author: 采儿 | Hits:

[VHDL-FPGA-VerilogVerilog

Description: 异步fifo的经典写法,使用verilog语言编写的。-Asynchronous fifo' s classic formulation, using verilog language.
Platform: | Size: 220160 | Author: 寻建晖 | Hits:

[VHDL-FPGA-Verilogspi_verilog

Description: SPI协议Verilog HDL程序,内含testbench 文件
Platform: | Size: 81920 | Author: dsahd | Hits:

[VHDL-FPGA-VerilogVerilog-vga

Description: 基于Verilog的VGA显示汉字、字符的例子以及vga资料-Verilog' s VGA display Chinese characters based on the character of the examples and information vga
Platform: | Size: 1349632 | Author: 江平 | Hits:

[VHDL-FPGA-Verilogsci_module

Description: verilog编写的串口模块,可以直接使用,已经成功用于产品上了。-UART by verilog.
Platform: | Size: 2048 | Author: 刘俊杰 | Hits:

[VHDL-FPGA-Verilogsdr-sdram-(verilog)

Description: Altera的SDR SDRAM模型,verilog实现,带说明书文件以及仿真文件、SDRAM原型文件。-Altera' s SDR SDRAM model, verilog implementation, with manual files and simulation files, SDRAM prototype file.
Platform: | Size: 777216 | Author: 左左 | Hits:

[VHDL-FPGA-VerilogVerilog-based-video-capture-source

Description: 基于XILINX的XST3开发板的视频采集源码,代码详细,已经测试通过-XILINX' s XST3 development board based on the video capture source code in detail, has been tested
Platform: | Size: 144384 | Author: tiger | Hits:

[DocumentsVerilog--GUIDE

Description: 本指南的很多信息都围绕Verilog 的句法组织但也有另外一些有关编码标准设计流程错误保留字以及在正文按字母顺序参考部分后面的编译器伪指令系统任务和函数以及命令行选项等特殊的部分-Much of the information in this guide revolves around Verilog s syntactic organization, but there are also other coding standards that are designed to keep the error flow Words, and the compiler directives behind the body of the alphabetical reference section System tasks and functions, as well as special parts such as command-line options
Platform: | Size: 468992 | Author: fanzzu | Hits:

[VHDL-FPGA-VerilogVerilog数字系统设计教程(第2版)

Description: 适合学习fpga的童鞋们,verilog语言数字系统设计,一本很不错的学习资料。(Suitable for learning fpga children's shoes, verilog language digital system design, a very good learning materials.)
Platform: | Size: 44099584 | Author: 斌河时代 | Hits:

[VHDL-FPGA-VerilogVerilog HDL

Description: Programming fpga's.
Platform: | Size: 2253824 | Author: Sensei | Hits:
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