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[File Operate] ip-core-verification-based-on-vhdl

Description: 在万方数据库中载的，有参考价值，自然科学基金支持项目-in popular database contains the reference value, the Natural Science Fund to support projects
Platform: | Size: 379961 | Author: 王嘉 | Hits:

[VHDL-FPGA-Verilog] QPSK2154

Description: QPSK的VERLOG源码，在MODELSIM下的一个工程，有测试向量。-QPSK VERLOG source of the MODELSIM of a project, test vector.
Platform: | Size: 23552 | Author: 刘仪 | Hits:

[source in ebook] 16fft_vhdl.ZIP

Description: 一个用FPGA实现的16FFT,仅供参考不作为工程文件-with an FPGA 16FFT, not only as a reference document projects
Platform: | Size: 266240 | Author: 武第 | Hits:

[VHDL-FPGA-Verilog] VHDL_Memory_Library_Code

Description: 通用存储器VHDL代码库,The Free IP Project VHDL Free-FIFO, Quartus standard library. -generic VHDL code for memory, The Free Project VHDL IP Free-FIFO, Quartus standard library.
Platform: | Size: 23552 | Author: Jawen | Hits:

[Communication-Mobile] 2005612300003FIRVHDL

Description: 自己在一个通信项目中设计的滤波器，在传统设计的基础上作了改进，具有更好的特性。-himself in a communications projects designed filter, in the traditional design made on the basis of improvement has better features.
Platform: | Size: 26624 | Author: 小令 | Hits:

[File Format] ip-core-verification-based-on-vhdl

Description: 在万方数据库中载的，有参考价值，自然科学基金支持项目-in popular database contains the reference value, the Natural Science Fund to support projects
Platform: | Size: 379904 | Author: 王嘉 | Hits:

[VHDL-FPGA-Verilog] my_fifo_vhdl

Description: XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
Platform: | Size: 19456 | Author: 朱效志 | Hits:

[VHDL-FPGA-Verilog] VHDL3

Description: vhdl进行高层次设计,对于做工程的很有。源程序还是有介绍.-VHDL for high-level design, for projects to do very. Source or introduction.
Platform: | Size: 896000 | Author: fff | Hits:

[VHDL-FPGA-Verilog] SDRAMconntrol

Description: SDRAM控制器的设计与VHDL实现 是pdf格式的。在工程中实现过-SDRAM Controller Design with VHDL realize is pdf format. In the projects implemented
Platform: | Size: 138240 | Author: hjx | Hits:

[Crack Hack] 1

Description: 智能卡的应用并不是简单的读写卡操作，而是一个综合性的工程项目。它不仅包括卡和读写模块的选择，还涉及到读写模块的控制、数据的传输、数据的处理和存储；既需要有硬件应用的知识、也还必须具有软件方面的能力。下面我们以一个完整的应用系统为例，详细地描述了各组成部分的设计要求、完成的功能及具体的实现方法。-Smart card application is not simple to read and write card operations, but a comprehensive engineering projects. It includes not only read and write cards and modules to choose, but also to read and write control module, data transmission, data processing and storage both need to have hardware knowledge, but also must also have the software capabilities. Now we as a complete application system as an example, described in detail the various components of the design requirements, the completion of the function and specific method.
Platform: | Size: 372736 | Author: yudakui | Hits:

[VHDL-FPGA-Verilog] Uart

Description: 用ＦＰＧＡ，VHDL实现的Uart核，quartusII完整工程，实用-Using FPGA, VHDL realize the UART core, quartusII complete projects, practical
Platform: | Size: 631808 | Author: wanyou | Hits:

[VHDL-FPGA-Verilog] tft_cntlr_ref_v1_00_c

Description: TFT LCD 控制器的VERILOG 源代码程序,已在某项目上成功应用.-TFT LCD controller VERILOG source code procedures have been in a successful application projects.
Platform: | Size: 15360 | Author: liubing | Hits:

[VHDL-FPGA-Verilog] uart_serial

Description: UART接口的VHDL源代码，成功应用于SOC项目开发中，请勿用于商业用途。-UART interface of the VHDL source code, successfully applied in the development of SOC projects, not for commercial purposes.
Platform: | Size: 12288 | Author: xiaojian | Hits:

[source in ebook] xapp348

Description: spi源码，是verliog的，有需要的可依参考进行设计自己的工程，后续有需要还有一个使用说明附上-spi-source is the verliog, reference may need to design their own projects, there is a need to have a follow-up instructions attached
Platform: | Size: 852992 | Author: lee | Hits:

[VHDL-FPGA-Verilog] 45561564

Description: 典型实例10.8 字符LCD接口的设计与实现 软件开发环境：ISE 7.1i 硬件开发环境：红色飓风II代－Xilinx版 1. 本实例控制开发板上面的LCD的显示； 2. 工程在\project文件夹里面 3. 源文件和管脚分配在\rtl文件夹里面 4. 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Typical examples of character LCD interface 10.8 The Design and Implementation of Software Development Environment: ISE 7.1i development environment hardware: Hurricane II on behalf of the red-Xilinx Edition 1. The above examples of the control board of the LCD display 2. Projects \ project folder inside 3. the distribution of the source file and pin in \ rtl folder inside 4. download files in \ download folder inside,. mcs file for the PROM mode download,. bit for the JTAG debugger to download the file.
Platform: | Size: 313344 | Author: 王磊 | Hits:

[Other Embeded program] CCD_senior_design_final_report

Description: 一个基于FPGA和CCD的视觉处理硬件平台项目开发文档-The design is a first step towards a hardware implementation of the super-resolution algorithms and other multimedia projects.The design presented in this paper may be used as a platform for many multimedia and image processing projects.
Platform: | Size: 483328 | Author: neversee | Hits:

[ELanguage] vga_demo.v.tar

Description: vga controller made for basic students projects in fpga vga controller made for basic students projects in fpga -vga controller made for basic students projects in fpga vga controller made for basic students projects in fpga vga controller made for basic students projects in fpga
Platform: | Size: 1024 | Author: Benji | Hits:

[File Operate] HDL

Description: file contains projects with source code, full description , simulation results .
Platform: | Size: 304128 | Author: Hemant Kumar | Hits:

[3G develop] AGC

Description: 自动增益控制，通过仿真验证，已用到工程中，在ISE中运行实现。-Automatic gain control, through the simulation has been used in projects, run in the ISE implementation.
Platform: | Size: 1024 | Author: 杨明 | Hits:

[VHDL-FPGA-Verilog] VHDL-projects

Description: I have simple five VHDL projects. I use FPGA Spartan3A family board with XC3S50A FPGA chip. This project was created in Xilinx ISE Design Suite version (13.2).It contains divider,XOR blocks, counters, moore automat and more.
Platform: | Size: 1505280 | Author: Jaroslav | Hits:
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