Description: vhdl mfsk
多进制数字频率调制(MFSK)也称多元调频或多频制。MFSK系统是 2FSK(二频键控)系统的推广，该系统有 M个 不同的载波频率可供选择．每一个载波频率对应一个 M进制码 元信息，即用多个频率不同的正弦波分别代表不同的数字信号，在某一码元时间内只发送其中一个频率。-vhdl mfsk M-ary digital frequency modulation (MFSK), also known as multi-frequency or multi-frequency system. MFSK system is 2FSK (b Frequency Shift Keying) system, the promotion, the system has M different carrier frequencies to choose from. Each carrier frequency corresponds to an M-band meta-information code, which uses a number of different sine wave frequency, respectively, representing different digital signal, in a symbol time to send only one frequency. Platform: |
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Author:mzizai |
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Description: 基于MATLAB/DSP Ｂuild可控信号发生器，由Ｍatlab建模综合，并生成ＶＨＤＬ代码，由Ｑuartus编译通过．-Based on MATLAB/DSP Build controllable signal generator, by the Matlab modeling synthesis, and generates VHDL code, adopted by the Quartus compiler. Platform: |
Size: 297984 |
Author:ltianyang |
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Description: 分析了MATLAB/Simulink 中DSP Builder 模块库在FPGA 设计中优点，
然后结合FSK 信号的产生原理，给出了如何利用DSP Builder 模块库建立FSK 信号发生器模
型，以及对FSK 信号发生器模型进行算法级仿真和生成VHDL 语言的方法，并在modelsim
中对FSK 信号发生器进行RTL 级仿真，最后介绍了在FPGA 芯片中实现FSK 信号发生器的设
计方法。-Analysis of the MATLAB/Simulink in DSP Builder Blockset in the FPGA design advantages, and then combined with the emergence of the principle of FSK signal is given how to use DSP Builder Blockset establish FSK signal generator model, as well as the FSK signal generator model algorithm class VHDL simulation and generation language approach, and in ModelSim for FSK signal generator for RTL-level simulation, and finally introduce the FPGA chip realize FSK signal generator design method. Platform: |
Size: 275456 |
Author:普林斯 |
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Description: FSK差分检波系统仿真的课程设计
本课程设计主要利用MATLAB集成环境下的Simulink仿真平台，设计一个FSK信号差分检波系统。观察FSK调制前后的信号波形,并对调制前后信号的频谱进行分析,再以调制信号为输入，构建差分检波解调系统电路，观察解调前后的信号波形，并对解调前后信号的频谱进行分析。加入噪声分析通过三种不同信道FSK信号差分检波系统接受信号的性能。仿真结果，基本达到课程设计要求。-FSK differential detection system simulation of the curriculum design of this course the main use of MATLAB integrated design environment of Simulink simulation platform, the design of a FSK signal differential detection system. Observed before and after FSK modulation signal waveforms, and modulation signal spectrum before and after analysis, and then modulated signal as input, build a system of differential detection demodulator circuits, observe the pre-and post-demodulation signal waveforms, and signal demodulation spectrum before and after analysis. Adding noise analysis through the three different channel FSK signal differential signal detection system to accept performance. The simulation results, the basic courses to meet the design requirements. Platform: |
Size: 652288 |
Author:球球 |
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Description: 这份是实验课上的教师和学生用的实例。关于用matlab simulink仿真状态机并生成vhdl代码的详细内容-The experimental class teachers and students to use examples. Matlab simulink simulation on the use of state machine and generates VHDL code details Platform: |
Size: 968704 |
Author:张三 |
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Description: 本文提出了加快发展之路
从理论设计,通过Matlab / Simulink环境
在定点算法对其行为模拟的
在FPGA或定制实现硅片。这个了
实现了netlist移植的Simulink系统
描述成的硬件描述语言[VHDL]。在这个例子中,这个
Simulink-to-VHDL转换器被设计来使用
代码来描述结构VHDL系统互连,
允许简单的行为说明基本模块。
结果VHDL bit-true交付后代码
比较定点Simulink仿真模型等效
模拟。-This paper presents the way of speeding up the route
from the theoretical design with Simulink/Matlab, via
behavioral simulation in fixed-point arithmetic to the
implementation on either FPGA or custom silicon. This has
been achieved by porting the netlist of the Simulink system
description into the VHDL. At the first instance, the
Simulink-to-VHDL converter has been designed to use
structural VHDL code to describe system interconnections,
allowing simple behavioral descriptions for basic blocks.
The resulting VHDL code delivers bit-true result when
compared to the equivalent fixed-point Simulink model
simulations. Platform: |
Size: 147456 |
Author:王晓 |
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Description: 于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use -Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program -于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use-Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program Platform: |
Size: 2048 |
Author:yujiao |
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Description: 于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use -Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program -于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use-Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program Platform: |
Size: 618496 |
Author:yujiao |
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Description: 基于matalab simulink中dspbuider实现am调制，将mdl文件转化为vhdl文件，在quartus2里面进行下载验证-Matalab simulink based on the realization of dspbuider modulation am to mdl file into vhdl file, download it in quartus2 authentication Platform: |
Size: 1769472 |
Author:沈友俊 |
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Description: 使用matlab中的simulink，通过DSP Builder进行编译成quartus可用的vhdl文件，简化实际工作量的流程方法-Use matlab in simulink, through the DSP Builder to compile into a vhdl file quartus available, simplifying the process method of the actual workload Platform: |
Size: 700416 |
Author:qinzhan |
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Description: 基于FPGA的BPSK数字调制器的实现，对于学习通信专业的人应该有些帮助-FPGA-Based Digital Modulator BPSK, for people to learn communication professional should be some help Platform: |
Size: 432128 |
Author:李博 |
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Description: This paper presents the way of speeding up the route
from the oretical design with Simulink/Matlab, via
behavioral simulation in fixed-point arithmetic to the
implementation on either FPGA or custom silicon. This has
been achieved by porting the netlist of the Simulink system
description into the VHDL. At the first instance, the
Simulink-to-VHDL converter has been designed to use
structural VHDL code to describe system interconnections,
allowing simple behavioral descriptions for basic blocks.
The resulting VHDL code delivers bit-true result when
compared to the equivalent fixed-point Simulink model
simulations.-This paper presents the way of speeding up the route
from the theoretical design with Simulink/Matlab, via
behavioral simulation in fixed-point arithmetic to the
implementation on either FPGA or custom silicon. This has
been achieved by porting the netlist of the Simulink system
description into the VHDL. At the first instance, the
Simulink-to-VHDL converter has been designed to use
structural VHDL code to describe system interconnections,
allowing simple behavioral descriptions for basic blocks.
The resulting VHDL code delivers bit-true result when
compared to the equivalent fixed-point Simulink model
simulations. Platform: |
Size: 147456 |
Author:jack |
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Description: 这个是在quartusii和matlab simulink下搭的dds的模型，已经经过仿真是可以的。并且已经转为vhdl代码。-This is quartusii and matlab simulink model to catch the dds, has been the simulation is possible. And has to vhdl code. Platform: |
Size: 1288192 |
Author:jiang |
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Search - vhdl to simulink