Search - write to sram

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[Other] 51汇编程序1ASM DL : 0: 本程序用于测试实时时钟模块SD2000的SRAM存储器D/E系列，程序功能如下： 1. 关闭/INT1及/INT2的中断输出 2. 初始化时间(写时间数据) 3. 在BREAKPOINT1设断点时,依次读时间-写SRAM数据-读SRAM数据循环 4. 全速执行时,LED四位分别显示小时和分钟的值-procedures used to test the real-time clock module SD2000 SRAM memory D/E Series, procedures following functions : 1. Closed/INT1 and/INT2 the interruption of output 2. Initialization time (the time to write data) 3. Located in BREAKPOINT1 breakpoint, followed by time for-write SRAM data-reading cycle of four data SRAM. full speed of implementation, respectively, four LED display hours and minutes values
Update : 2025-02-17 Size : 4kb Publisher : 小顽童
[VHDL-FPGA-Verilog] tom08 DL : 0: SRAM 视频采集测试程序读写时序控制为解决时钟切换而做的测试程序-SRAM test sequential read and write control procedures to resolve the clock switching out of the test procedure
Update : 2025-02-17 Size : 146kb Publisher : 刘留
[Other Embeded program] epp_sram DL : 0: verilog语言编写的FPGA代码。功能为pc机通过epp不断写数到sram中，然后pc发送中断信号打断写过程读取sram中的数据。rar包中包含epp协议，模块文件和测试文件（test）。-Verilog FPGA code languages. Pc machine functions through a number of epp constantly write to the SRAM, and then pc send interrupt signals to interrupt the process of writing to read the data in the SRAM. rar package includes epp agreement, modules and test documents (test).
Update : 2025-02-17 Size : 42kb Publisher : 苗苗
[VHDL-FPGA-Verilog] FPGA_write_sram DL : 0: FPGA向SRAM中写入数据，VHDL编程-FPGA to the SRAM write data, VHDL programming
Update : 2025-02-17 Size : 256kb Publisher : 简
[SCM] MSP430_Exter_Sram DL : 0: MSP430 F149对外部SRAM(EG：62256)的操作，可以正常读写，验证通过-MSP430 F149 to external SRAM (EG: 62256) operation, can be normal to read and write, verify through
Update : 2025-02-17 Size : 1kb Publisher : 齐全
[Other] videocap DL : 0: 视频采集控制缓存SRAM读写，对做视频采集有很好的参考。-Video capture control of the cache SRAM read and write, and to do video capture a very good reference.
Update : 2025-02-17 Size : 8kb Publisher : 刘留
[SCM] SRAM_RWtest DL : 0: SRAM_RWtest sram 用8051f020开发的读写测试程序-SRAM_RWtest sram with 8051f020 developed to read and write test procedures
Update : 2025-02-17 Size : 57kb Publisher : 谭建平
[Embeded-SCM Develop] testram_1 DL : 0: EDA实验--RAM实验:利用-MegaWizard Plug-In Manager创建一个16×8的RAM，通过编程对RAM进行读写并在显示器上显示。本例使用三个按键PSW3，PSW2，PSW1，分别对应顶层文件中的x，y，we，we＝1对RAM写，xy＝11时，写入10101011；当xy＝01时，写入01010101；当xy＝10时，写入10101010。we＝0时，对RAM读出。三个按键按下时为0，当PSW1健按下时对RAM进行读出。 -EDA Experimental RAM experiment: the use-MegaWizard Plug-In Manager to create a 16 × 8 of the RAM, through the programming of the RAM read and write and displayed on the monitor. This example uses three buttons PSW3, PSW2, PSW1, corresponding to top-level document x, y, we, we = 1 on RAM write, xy = 11, the write 10101011 when xy = 01 hours, write 01010101 when xy = 10, the write 10101010. we = 0 when read out of RAM. Press the three keys for 0, when PSW1 Kin-pressed to read out of RAM.
Update : 2025-02-17 Size : 4kb Publisher : 黄龙
[VHDL-FPGA-Verilog] sram+lcd DL : 0: 用vhdl格式写的sram源代码，把扩展名txt改为.v即可-VHDL format used to write the SRAM source code, to be re-txt extension. V can
Update : 2025-02-17 Size : 2kb Publisher : 郭艳红
[VHDL-FPGA-Verilog] sram DL : 0: FPGA向SRAM中写入数据(VHDL编程)，包含通用fifo，sram等-FPGA to the SRAM write data (VHDL programming), contains general fifo, sram, etc.
Update : 2025-02-17 Size : 264kb Publisher : 王刚
[VHDL-FPGA-Verilog] SRAM-PINGPANG DL : 0: 超声视频图像需要实时地采集并在处理后在显示器上重建，图像存储器就必须不断地写入数据，同时又要不断地从存储器读出数据送往后端处理和显示[11]。为了满足这种要求，可以在采集系统中设置2片容量一样的SRAM，通过乒乓读写机制来管理。任何时刻，只能有1片SRAM处于写状态，同时也只有1片SRAM处于读状态。工作期间，2片SRAM都处于读写状态轮流转换的过程，转换的过程相同，但是状态错开，从而保证数据能连续地写人和读出祯存.-Real-time ultrasound video images need to collect and deal with the reconstruction after the display, image memory must be continually write data, while at the same time continuously sent from the memory读出数据back-end processing and display [11]. To meet this requirement, you can set up collection system capacity of two different SRAM, read and write through the ping-pong mechanisms to manage. At any time, can only have a SRAM in write state, but also the only one at a time the state of SRAM. Work, two SRAM read and write are in the process of converting a state of rotation, the conversion process of the same, but the state staggered to ensure that data can be continuously written and read out Qizhen depositors.
Update : 2025-02-17 Size : 1kb Publisher : smj1980
[USB develop] CY7c68013_fpga_write_sram DL : 0: FPGA自FX2 slavefifo中读取数据，写入至SRAM-FPGA since FX2 slavefifo read data, write to the SRAM
Update : 2025-02-17 Size : 280kb Publisher : 郭伟
[Other] sram DL : 0: 对常用的sram完成读写控制，可以根据具体地址增加参数，非常灵活-Commonly used to read and write sram to complete control, can be increased in accordance with the specific parameters of address, a very flexible
Update : 2025-02-17 Size : 141kb Publisher : yaodi
[SCM] sram DL : 0: STC51单片机128K sram读写实验的C语言程序，串口调试助手显示。-STC51 MCU 128K sram experimental C-language program to read and write, serial debugging assistant display.
Update : 2025-02-17 Size : 154kb Publisher : 王稼祥
[Other] sram DL : 0: to write and read from an sram. its actually a logic cell,when the write enable is high its possible to write data onto a memory location when read enable is high we can read the data in given memory location
Update : 2025-02-17 Size : 37kb Publisher : mariamma
[SCM] sram DL : 0: 单片机写双口RAM，包括读写是否一致的自动检测-Microcontroller to write dual-port RAM, including the automatic detection of the consistency of read and write
Update : 2025-02-17 Size : 2kb Publisher : 孙殿举
[VHDL-FPGA-Verilog] SRAM_Write_read DL : 0: SRAM读写的VHDL实验,通过对写入的数据与读出的数据进行比较,判断读写SRAM是否成功-SRAM read and write VHDL experiments on written data and read data to compare, to judge the success of SRAM read and write
Update : 2025-02-17 Size : 459kb Publisher : binbin
[VHDL-FPGA-Verilog] SRAM-FPGA DL : 0: 用FPGA实现SRAM读写控制的Verilog代码-SRAM FPGA implementation using Verilog code to read and write control
Update : 2025-02-17 Size : 13kb Publisher : austin
[VHDL-FPGA-Verilog] sramright DL : 0: 控制SRAM的读写；向SRAM中写入12个数据，这12个数据由助教随机给出；当按下4×3键盘上的按键时，读出对应的数据，并显示在七段数码管上； SRAM为16位，用16进制表示为4位字符，对应4个七段数码管； -Control SRAM read and write write to the SRAM 12 data, the 12 random data is given by the TA when you press the 4 × 3 keys on the keyboard when the corresponding data read and displayed in the seven-segment LED on SRAM is 16 bits, that is 4 by 16 hexadecimal characters, corresponding to four seven-segment LED
Update : 2025-02-17 Size : 2kb Publisher : 李峰
[Windows Develop] SRAM DL : 0: SRAM读写测试实例，每秒钟进行一次单字节的SRAM 读和写操作，用chipscope查看时序波形。(SRAM read and write test instances, each time a single byte SRAM Read and write operations, use chipscope to see the timing waveform.)
Update : 2025-02-17 Size : 1.28mb Publisher : 航天梦

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