Search - xilinx core

[Other resource] FPGA

Description: FPGA设计全流程：Modelsim>>Synplify.Pro>>ISE 第一章 Modelsim编译Xilinx库第二章调用Xilinx CORE-Generator 第三章使用Synplify.Pro综合HDL和内核第四章综合后的项目执行第五章不同类型结构的仿真
Platform: | Size: 218238 | Author: 青岚之风 | Hits:

[SCM] oc8051

Description: 51的VERILOG代码！适用于Xilinx的FPGA-51 VERILOG code! In Xilinx FPGA
Platform: | Size: 1220608 | Author: 林建加 | Hits:

Description: IP核生成器生成 ip 后有两个文件对我们比较有用，假设生成了一个 asyn_fifo 的核，则 asyn_fifo.veo 给出了例化该核方式（或者在 Edit－>Language Template->COREGEN 中找到 verilog/VHDL 的例化方式）。asyn_fifo.v 是该核的行为模型，主要调用了 xilinx 行为模型库的模块，仿真时该文件也要加入工程。-IP core generator generate ip after two documents more useful to us. Formation of a hypothetical nuclear asyn_fifo, asyn_fifo.veo were given cases of the methods (or Edit-
Platform: | Size: 359424 | Author: 任学 | Hits:

[ARM-PowerPC-ColdFire-MIPS] FFT_IP

Description: Xilinx FPGA 的IP核，实现FFT功能的-Xilinx FPGA IP core, FFT function
Platform: | Size: 419840 | Author: zxinkai | Hits:

[Mathimatics-Numerical algorithms] 81i_radix2_xfft1024_v3_2

Description: xilinx FFT using ip core project navigator-xilinx ip using FFT core project navigator
Platform: | Size: 1432576 | Author: ningchang | Hits:

[Embeded-SCM Develop] 8051forxilinx

Description: 我在spartan-3e starter kit 的板上实现了mc8051，程序调试通过，运行正常。方法 1、用Keil 编译8051的代码； 2、将生成的hex文件用hex->bin工具转成bin文件 3、用bin－>coe工具转成coe 4、在core generate 生成的rom中指明coe文件的位置 5、编译、下载到spartan-3e starter kit 板上，你将会看到流水灯的效果我正在做这方面的东西，欢迎大家与我一起探讨。-I spartan- 3e of the starter kit board realized mc8051. through debugging procedures, operating normally. A method of using the Keil compiler code 8051; 2, will produce the documents hex hex-
Platform: | Size: 608256 | Author: lanty | Hits:

[VHDL-FPGA-Verilog] ip_fft128

Description: 128点fft的IP核vhdl源代码，另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
Platform: | Size: 7168 | Author: 戈立军 | Hits:

[VHDL-FPGA-Verilog] ml505_pcie_x1_plus

Description: Xilinx 公司PCI Express IP核应用参考设计。通过这个样例，用户可以掌握PCI Express应用设计的一般方法，了解PCI Express的工作原理。-Xilinx Inc. PCI Express IP core reference design applications. Through this example, the user can master the application of the design of PCI Express general approach to understand the working principle of PCI Express.
Platform: | Size: 1798144 | Author: daniel J | Hits:

[Software Engineering] XILINX_sp3_sch

Description: XILINX公司SP3开发板原理图,包括核心板和扩展板-XILINX Corporation SP3 development board schematic diagram, including the core board and expansion board
Platform: | Size: 287744 | Author: 张 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA设计全流程：Modelsim>>Synplify.Pro>>ISE 第一章 Modelsim编译Xilinx库第二章调用Xilinx CORE-Generator 第三章使用Synplify.Pro综合HDL和内核第四章综合后的项目执行第五章不同类型结构的仿真-FPGA design of the whole process: Modelsim>> Synplify.Pro>> ISE Chapter ModelSim Xilinx compiler library chapter called Xilinx CORE-Generator Chapter III Synplify.Pro integrated use of Chapter IV of HDL and kernel integrated implementation of the project after the Chapter V structure of different types of simulation
Platform: | Size: 218112 | Author: 青岚之风 | Hits:

[VHDL-FPGA-Verilog] DUC

Description: 数字上变频DUC是与数字下变频ddc相对应的工作.目前实现方式主要有:专用芯片,通用DSP和FPGA实现三种.本程序即给出了XILINX公司的Digital Up Converter核心程序(IP CORE)以及响应的使用说明,对于从事雷达,无线通信的工程人员和研究者有很大用处.-DUC is a digital up-conversion and digital down conversion that corresponds to the work of ddc. Realize the current approach are: ASIC, DSP and FPGA generic realize three. This procedure is given that the company XILINX core Digital Up Converter program (IP CORE) and to respond to instructions, for radar, wireless communications, engineers and researchers have great usefulness.
Platform: | Size: 305152 | Author: 周严 | Hits:

[VHDL-FPGA-Verilog] studyFFTcore

Description: 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
Platform: | Size: 1287168 | Author: 徐成发 | Hits:

[Documents] 08Tutorial3

Description: tutorial of xilinx ip core
Platform: | Size: 376832 | Author: adeel | Hits:

[VHDL-FPGA-Verilog] pciug159

Description: XILINX ISE生成PCI-CORE时产生的用户文档,帮助编写PCI通信用户逻辑,非常有用-XILINX ISE generation PCI-CORE generated user documentation to help users prepare PCI communication logic, a very useful
Platform: | Size: 1374208 | Author: 田杰 | Hits:

[Communication-Mobile] core_licenses_full

Description: 这个是XILINX公司FPGA的aurora，IP授权！！完全好用!-This is the XILINX' s FPGA-aurora, IP licensing! ! Totally easy to use!
Platform: | Size: 2048 | Author: lele | Hits:

[File Format] Advanced-Xilinx-FPGA

Description: Advanced Xilinx FPGA Design with ISE Objectives Describe Virtex™ -II advanced architectural features and how they can be used to improve performance • Create and integrate cores into your design flow using the CORE Generator™ System • Describe the different ISE options available and how they can be used to improve performance • Describe a flow for obtaining timing closure with Advance Timing Constraints • Use FloorPlanner to improve timing • Reduce implementation time with Incremental Design Techniques and Modular Design Techniques • Reduce debugging time with FPGA Editor • On-Chip Verification with ChipScope Pro-Advanced Xilinx FPGA Design with ISE Objectives Describe Virtex™ -II advanced architectural features and how they can be used to improve performance • Create and integrate cores into your design flow using the CORE Generator™ System • Describe the different ISE options available and how they can be used to improve performance • Describe a flow for obtaining timing closure with Advance Timing Constraints • Use FloorPlanner to improve timing • Reduce implementation time with Incremental Design Techniques and Modular Design Techniques • Reduce debugging time with FPGA Editor • On-Chip Verification with ChipScope Pro
Platform: | Size: 10615808 | Author: rakesh | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list