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VHDL-FPGA-Verilog list
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VHDL language used to read and write operations controller SDRAM and its simple test sequence.
Update : 2025-01-12 Size : 25.75mb Publisher : Devil0823

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Multi clock selection, different modes can be selected according to different clock
Update : 2025-01-12 Size : 15.62mb Publisher : xiaoqiang

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FPGA implements the RS (255239) encoding and decoding module
Update : 2025-01-12 Size : 588kb Publisher : qazmkob

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quartus 12 "solution"
Update : 2025-01-12 Size : 13kb Publisher : gustavo

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quartus 12 "solution" 2
Update : 2025-01-12 Size : 13kb Publisher : gustavo

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quartus 9 "solution"
Update : 2025-01-12 Size : 887kb Publisher : gustavo

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quartus 9 "solution" 2
Update : 2025-01-12 Size : 914kb Publisher : gustavo

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Sixteen decimal to BCD, including design documents and simulation files, engineering documents
Update : 2025-01-12 Size : 3kb Publisher : lqx

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FPGA based sine wave signal generation, frequency control, very useful
Update : 2025-01-12 Size : 1kb Publisher : wwwyh

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The document includes a variety of divider, different types, different algorithms.
Update : 2025-01-12 Size : 8kb Publisher : FollowSky

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Various multipliers, different algorithmic types, are applied to different situations.
Update : 2025-01-12 Size : 15kb Publisher : FollowSky

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The functions of FIFO are known to be very good at dealing with timing problems.
Update : 2025-01-12 Size : 1kb Publisher : FollowSky
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