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VHDL-FPGA-Verilog list
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dds(1)
Downloaded:0
Design of signal generator based on DDS.DDS,FPGA,Verilog.
Update
: 2025-01-12
Size
: 10.51mb
Publisher
:
电磁驱动
ARINC429航空总线协议标准
Downloaded:0
FPGA implementation ARINC429 protocol using verilog HDL to do a complete ARINC429 communication transceiver protocol,
Update
: 2025-01-12
Size
: 346kb
Publisher
:
shukuang
adder
Downloaded:0
it's an addler of four bits which is designed for the new designer of VHDL
Update
: 2025-01-12
Size
: 85kb
Publisher
:
秦秦秦
m60v20161109
Downloaded:0
Using Verilog language to achieve the modulus of 60 counters, compiled by qualified, using quarter2 and above can be used directly
Update
: 2025-01-12
Size
: 268kb
Publisher
:
风行者199765
m60component20161109
Downloaded:0
Using Verilog language to achieve the modulus of 60 counters, compiled by qualified, using quarter2 and above can be used directly, and the use of sub block mode
Update
: 2025-01-12
Size
: 273kb
Publisher
:
风行者199765
ad
Downloaded:0
ad transform using vhdl
Update
: 2025-01-12
Size
: 658kb
Publisher
:
JJJJJJJJJ
F0501
Downloaded:0
Automotive VCU controller test tooling procedures, STM32 microcontroller expansion bus read and write FPGA, the internal RAM, DDS way to generate PWM, PWM frequency, pulse width measurement function
Update
: 2025-01-12
Size
: 7.32mb
Publisher
:
nan211
FPGA-频率计(等精度测频+SPI通信)
Downloaded:0
This procedure uses FPGA programming, such as precision frequency measurement procedures, and to achieve SPI communication procedures.
Update
: 2025-01-12
Size
: 1.35mb
Publisher
:
默默离开了
UDP_verilog
Downloaded:0
Implemented with verilog UDP protocols, including arp, udp, ip fragmentation protocol, etc.
Update
: 2017-07-13
Size
: 16.61kb
Publisher
:
sunhaichaook@163.com
main
Downloaded:0
Embedded system encryption FPGA implementation source code, can be used directly for the project
Update
: 2025-01-12
Size
: 3.24mb
Publisher
:
松哥HIT
mcu_led2
Downloaded:0
Based on the vivado platform, the use of MicroBlaze to build a small system, and can light LED
Update
: 2025-01-12
Size
: 66.33mb
Publisher
:
D蒙
MCPU
Downloaded:0
multi-cycle CPU by verilog and using vivado to simulate.
Update
: 2025-01-12
Size
: 5.6mb
Publisher
:
Lsinger
«
1
2
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.27
.28
.29
.30
.31
232
.33
.34
.35
.36
.37
...
4311
»
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