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VHDL-FPGA-Verilog list
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Design of signal generator based on DDS.DDS,FPGA,Verilog.
Update : 2025-01-12 Size : 10.51mb Publisher : 电磁驱动

FPGA implementation ARINC429 protocol using verilog HDL to do a complete ARINC429 communication transceiver protocol,
Update : 2025-01-12 Size : 346kb Publisher : shukuang

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it's an addler of four bits which is designed for the new designer of VHDL
Update : 2025-01-12 Size : 85kb Publisher : 秦秦秦

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Using Verilog language to achieve the modulus of 60 counters, compiled by qualified, using quarter2 and above can be used directly
Update : 2025-01-12 Size : 268kb Publisher : 风行者199765

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Using Verilog language to achieve the modulus of 60 counters, compiled by qualified, using quarter2 and above can be used directly, and the use of sub block mode
Update : 2025-01-12 Size : 273kb Publisher : 风行者199765

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ad transform using vhdl
Update : 2025-01-12 Size : 658kb Publisher : JJJJJJJJJ

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Automotive VCU controller test tooling procedures, STM32 microcontroller expansion bus read and write FPGA, the internal RAM, DDS way to generate PWM, PWM frequency, pulse width measurement function
Update : 2025-01-12 Size : 7.32mb Publisher : nan211

This procedure uses FPGA programming, such as precision frequency measurement procedures, and to achieve SPI communication procedures.
Update : 2025-01-12 Size : 1.35mb Publisher : 默默离开了

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Implemented with verilog UDP protocols, including arp, udp, ip fragmentation protocol, etc.
Update : 2017-07-13 Size : 16.61kb Publisher : sunhaichaook@163.com

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Embedded system encryption FPGA implementation source code, can be used directly for the project
Update : 2025-01-12 Size : 3.24mb Publisher : 松哥HIT

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Based on the vivado platform, the use of MicroBlaze to build a small system, and can light LED
Update : 2025-01-12 Size : 66.33mb Publisher : D蒙

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multi-cycle CPU by verilog and using vivado to simulate.
Update : 2025-01-12 Size : 5.6mb Publisher : Lsinger
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