VHDL-FPGA-Verilog List Page 3462

VHDL-FPGA-Verilog list

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simpleSPI_M_S Downloaded：0: SPI of the VHDL program, after verification of xilinx
Update : 2025-03-15 Size : 139kb Publisher : 陳皇仁
simpleFIFO Downloaded：0: FIFO process of VHDL hardware description language source code
Update : 2025-03-15 Size : 134kb Publisher : 陳皇仁
Uart Downloaded：0: Uart bus, VHDL language, VHDL source code
Update : 2025-03-15 Size : 10kb Publisher : 陳皇仁
simpleDivider Downloaded：0: Divider, VHDL language, VHDL source code
Update : 2025-03-15 Size : 37kb Publisher : 陳皇仁
simpleRam Downloaded：0: simpleRAM, VHDL language, VHDL source code
Update : 2025-03-15 Size : 43kb Publisher : 陳皇仁
transfer Downloaded：0: The CPLD-based PWM waveform generator, the programming language to verilog, development environment for QuartusII.
Update : 2025-03-15 Size : 2kb Publisher : ouyangyajuan
verilog_all Downloaded：0: Verilog HDL detailed tutorial, it is suitable for beginners to use.
Update : 2025-03-15 Size : 2.94mb Publisher : 徐孟秋
in_out_put Downloaded：0: The Verilog bidirectional RAM process, to achieve a two-way mass data
Update : 2025-03-15 Size : 732kb Publisher : you
ac_control Downloaded：0: air conditioner controller ,with three speeds,cool/heat based on altera fpga
Update : 2025-03-15 Size : 616kb Publisher : abu_faisul
aulto Downloaded：0: Vending machine control circuit, with a total amount of input and control output of goods and give change automatically.
Update : 2025-03-15 Size : 4kb Publisher : TINO
up_down_counter Downloaded：0: 32 bit up/down counter with count enable based on altera fpga
Update : 2025-03-15 Size : 453kb Publisher : abu_faisul
tri_ramp_gen Downloaded：0: an 8-bit triangle/ramp wave generator based on altera fpga
Update : 2025-03-15 Size : 446kb Publisher : abu_faisul

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