VHDL-FPGA-Verilog List Page 349

VHDL-FPGA-Verilog list

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frequence_430new Downloaded：0: Digital frequency meter design FPGA-based, measurable frequency waveform cycle duty cycle
Update : 2025-01-16 Size : 8.31mb Publisher : 虞连贵
verilog Downloaded：0: This document designed a grating displacement sensor signal reception, grating displacement sensor signal shaping and level conversion circuit design, using Verilog HDL description of segments and zero phase-locked harmo
Update : 2025-01-16 Size : 106kb Publisher : 吴汉
sine_package Downloaded：0: ve verilog va tai lieu
Update : 2025-01-16 Size : 1kb Publisher : DAO THANH MAI
mipsx2 Downloaded：0: SOC design and FPGA-based functional test, use mips instruction set written soc system on a chip, and functional verification
Update : 2025-01-16 Size : 1.44mb Publisher : wuqi
151019_halfadder Downloaded：0: This program is FPGA using VHDL language to achieve a half-adder function, a good reference for beginners.
Update : 2025-01-16 Size : 2kb Publisher : 安安
yuandengke Downloaded：0: yuandengke pmsm of book matalb
Update : 2025-01-16 Size : 186kb Publisher : 申彦磊
vga Downloaded：0: This VHDL sample demonstrates how to generate a VGA signal to make it possible to connect an FPGA to a monitor. Written for Mimas v2, but probably easily adapted to any other board with a VGA connector on it (that can al
Update : 2025-01-16 Size : 1kb Publisher : Ruben
clock_monitor Downloaded：0: Clock detection module, the system is running, keep the clock frequency detection
Update : 2025-01-16 Size : 1kb Publisher : zhangxin
inout Downloaded：0: some RAM testingfiles，and its testbench
Update : 2025-01-16 Size : 6kb Publisher : 小胡
FPGA_PWM Downloaded：0: The code function is to achieve PWM functions on FPGA, the duty cycle can be achieved with the adjustable frequency rectangular wave.
Update : 2025-01-16 Size : 107kb Publisher : 小松
AGC Downloaded：0: FPGA to complete the use of AGC automatic gain code, suitable for beginners
Update : 2025-01-16 Size : 3.22mb Publisher : zhouxiao
SOS Downloaded：0: Using MATLAB to generate SOS filter, applied to a small system of FPGA, there is a certain reference value
Update : 2025-01-16 Size : 3.86mb Publisher : zhouxiao

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