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VHDL-FPGA-Verilog list
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prj_button_anti_shake
Downloaded:0
按键消抖的fpga程序,code is based on verilog language, it is practical, we hope to help
Update
: 2025-01-17
Size
: 41kb
Publisher
:
李丽
tlv1544
Downloaded:0
TLV1544 collection procedures, using verilog language, feel useful, hope to adopt
Update
: 2025-01-17
Size
: 2.14mb
Publisher
:
李丽
Random-sequence-of-test
Downloaded:0
Random sequence of test source, the use verilog to write, feel useful, I hope you like
Update
: 2025-01-17
Size
: 2kb
Publisher
:
李丽
IIC
Downloaded:0
Verilog IIC program, RAM interface, easy to debug, and more a master
Update
: 2025-01-17
Size
: 1kb
Publisher
:
吴洋
iic_src
Downloaded:0
Standard I2C bus timing implementation, can be used to initialize the I2C device。
Update
: 2025-01-17
Size
: 3kb
Publisher
:
huowei
uartsample
Downloaded:0
EDK Xilinx development through FPGA to achieve UART communication
Update
: 2025-01-17
Size
: 2.3mb
Publisher
:
huowei
lab3_1
Downloaded:0
VHDL use four dial input data, input two numbers displayed on the digital control, the other two digital display its negation, then leave a four-digit digital tube left at one-second cycle
Update
: 2025-01-17
Size
: 658kb
Publisher
:
刘天
lab4_1
Downloaded:0
Clock synchronization state machine Modular template
Update
: 2025-01-17
Size
: 256kb
Publisher
:
刘天
lab4_2
Downloaded:0
Pulse width measurement, press the button to start measuring the pulse width, and the design of the overflow reset signal, using the state machine Modular Design
Update
: 2025-01-17
Size
: 334kb
Publisher
:
刘天
lab3
Downloaded:0
Digital scanning circuit, through digital scanning of multiple simultaneous digital imaging capabilities
Update
: 2025-01-17
Size
: 1.41mb
Publisher
:
刘天
lab3_2
Downloaded:0
Plus/minus sixteen adjustable counter can be cleared, the code clear
Update
: 2025-01-17
Size
: 486kb
Publisher
:
刘天
Reed-Solomon-RS-ENCODE-DECODE
Downloaded:0
This program is an encoder/decoder for Reed-Solomon codes.
Update
: 2025-01-17
Size
: 4kb
Publisher
:
songyongbin
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