VHDL-FPGA-Verilog List Page 3662

VHDL-FPGA-Verilog list

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PiSo Downloaded：0: 8-bit parallel input into serial output digital conversion is based on the high-level hardware programming language VHDL prepared.
Update : 2025-01-31 Size : 191kb Publisher : zhangzhen
shop Downloaded：0: Vending machine control system, with information on goods store, process control, coin processing, the balance of the calculation and display functions.
Update : 2025-01-31 Size : 2kb Publisher : dong
PSTOLCD Downloaded：0: This xinlix system in the development of PS communication program, with the development of VHDL language
Update : 2025-01-31 Size : 737kb Publisher : zengshuting
taxi Downloaded：0: Taxi billing system. Pricing starts, 3km after 1.2/km calculated that when the meter reached 20 yuan per km additional 50 of the fare. Cars do not stop and suspend billing.
Update : 2025-01-31 Size : 2kb Publisher : dong
shepinreliao Downloaded：0: This FPGA-based design of radiofrequency hyperthermia system, including the temperature measurement module, the design of modules specified temperature, the fuzzy controller module, temperature display and sub-modules su
Update : 2025-01-31 Size : 10kb Publisher : dong
beipin_top Downloaded：0: Times verilog HDL code to describe the use of, 2 octave function can be achieved, but the frequency of a bit error.
Update : 2025-01-31 Size : 99kb Publisher : 刘三平
lpf Downloaded：0: The achievement of low-pass function vhdl sample code can be run in quartus.
Update : 2025-01-31 Size : 4kb Publisher : 桑
traffic Downloaded：0: Vhdl traffic lights to achieve the program can be run in quartus, this is a normally encountered in the experimental class midfielder applet.
Update : 2025-01-31 Size : 1kb Publisher : 桑
dianziqin Downloaded：0: vb prepared organ, electric piano emulation interface is included with the FPGA serial communication functions.
Update : 2025-01-31 Size : 5kb Publisher : tianyongfan
intro_40nm_xcvr_portfolio_finaledit_cn Downloaded：0: Altera的40-nm收发器系列产品, 发展趋势和挑战
Update : 2025-01-31 Size : 985kb Publisher : Thomas
SY10 Downloaded：0: The musical performance circuit’s design and implement Abstract: This paper introduced CPLD／FPGA programmable logic device, development entironment MAX+PLUSⅡ,hardware description language HDL which are related to the mus
Update : 2025-01-31 Size : 300kb Publisher : guo
FPGA_SPI_FLASH Downloaded：0: Application Guide on the Spartan-3E series of serial peripheral interface (SPI) configuration mode. SPI configuration mode broadened SpartanTM-3E designers can use to configure the solution. SPI Flash memory-pin small pa
Update : 2025-01-31 Size : 363kb Publisher : xth

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