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VHDL-FPGA-Verilog list
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audio_project
Downloaded:0
Enhanced Audio Project by Dixie Xue & Wei Zhang
Update
: 2025-01-27
Size
: 1.2mb
Publisher
:
isoft
checkers
Downloaded:0
VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani
Update
: 2025-01-27
Size
: 1.28mb
Publisher
:
isoft
GIFImageViewer
Downloaded:0
vhdl code for GIF Image Viewer
Update
: 2025-01-27
Size
: 184kb
Publisher
:
isoft
vgaoutfiles
Downloaded:0
vhdl code for obtaining video output through vga port
Update
: 2025-01-27
Size
: 18kb
Publisher
:
isoft
8051VHDLSource
Downloaded:0
Toplevel VHDL Structural model of a system containing 8051
Update
: 2025-01-27
Size
: 36kb
Publisher
:
isoft
pif2wb_latest.tar
Downloaded:0
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave
Update
: 2025-01-27
Size
: 2.15mb
Publisher
:
Arun
ima_adpcm_encoder_latest.tar
Downloaded:0
This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA ADPCM code
Update
: 2025-01-27
Size
: 23kb
Publisher
:
Arun
vga_colors
Downloaded:0
Communication and Control through the vga display colorful provisions quartus compiled through the procedures that can be used
Update
: 2025-01-27
Size
: 270kb
Publisher
:
夏英杰
FIFO_V2
Downloaded:0
its a Fifo BASED design i also Interface DAC2904
Update
: 2025-01-27
Size
: 4.31mb
Publisher
:
jawad
ram
Downloaded:0
Altera ep2c8-based dual-port RAM
Update
: 2025-01-27
Size
: 864kb
Publisher
:
秦学富
VHDL
Downloaded:0
VHDL design entities, the basic structure of the language element of VHDL using VHDL circuit design approach to achieve VHDL design flow
Update
: 2025-01-27
Size
: 49kb
Publisher
:
李明
sequencedetector
Downloaded:0
verilog code for 3 bit sequence detector
Update
: 2025-01-27
Size
: 500kb
Publisher
:
anup
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