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交通信号灯
Downloaded:0
Electronic design automation in the conversion of traffic signals on the realization of the procedure, based on the realization of VHDL language
Update
: 2025-01-27
Size
: 4kb
Publisher
:
王康
DPD_LUT
Downloaded:1
A method of predistortion based on LUT. Some of them have reference value. -one method of DPD based on LUT
Update
: 2025-01-27
Size
: 2.44mb
Publisher
:
智慧川
43680540SPI_Core
Downloaded:0
Verilog for SPI Core source code
Update
: 2025-01-27
Size
: 14kb
Publisher
:
J.M Yang
107215786i2c_master_verilog
Downloaded:0
Verilog for I2C core source code
Update
: 2025-01-27
Size
: 242kb
Publisher
:
J.M Yang
PS2
Downloaded:0
Read the keyboard to use the example of FPGA, at the same time data can be read by the digital display.
Update
: 2025-01-27
Size
: 111kb
Publisher
:
baiyang
DE2_TV
Downloaded:0
based DE2 development board ,it is vhdl resourse code
Update
: 2025-01-27
Size
: 137kb
Publisher
:
zhaoqian
cpld
Downloaded:0
ATEREAL EPM1270T144C5N CPLD-based pressure sensor data acquisition source Quartus II development software
Update
: 2025-01-27
Size
: 301kb
Publisher
:
胡兵
myclock
Downloaded:0
VHDL language used to achieve a display hours, minutes and seconds of the clock: when can be manually corrected and points 12 hours, optional 24-hour time system, 12-hour on the afternoon of instructions from time to tim
Update
: 2025-01-27
Size
: 374kb
Publisher
:
旭东
division
Downloaded:0
The design of non - integer frequency divider is completed by dividing frequency ratio cross - frequency and accumulator frequency division. - Points were staggered method and frequency than the frequency accumulator law
Update
: 2025-01-27
Size
: 28kb
Publisher
:
旭东
cpu
Downloaded:0
VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to ve
Update
: 2025-01-27
Size
: 1.21mb
Publisher
:
Rachel
DW8051_verilog
Downloaded:0
DW8051 microcontroller design, HDL design, detailed design of the HDL
Update
: 2025-01-27
Size
: 133kb
Publisher
:
liaobin
RTC_Test_Top
Downloaded:0
With Actel' s Fusion Series FPGA development of experimental procedures RTC
Update
: 2025-01-27
Size
: 1kb
Publisher
:
毕京鹏
«
1
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.85
.86
.87
.88
.89
3690
.91
.92
.93
.94
.95
...
4311
»
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