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VHDL-FPGA-Verilog list
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crc_16
Downloaded:0
Verilog realize the use of a (2,1,2) convolutional code encoder, yo useful!
Update
: 2025-01-16
Size
: 1kb
Publisher
:
刘横
fft_32k
Downloaded:0
FFT 32k use VHDL MATLAB
Update
: 2025-01-16
Size
: 962kb
Publisher
:
8255_OSED
Downloaded:0
Using VHDL language 8255, it adopted EDA platform can be used in place of 8255.
Update
: 2025-01-16
Size
: 221kb
Publisher
:
maxinyue
CORDIC_DDS_16bit
Downloaded:0
dds frequency generated files, see if there is no one really wants to read your document carefully and then write its packet with
Update
: 2025-01-16
Size
: 1.29mb
Publisher
:
zhangxi
tdmddc_v71
Downloaded:0
ddc the VHDL source code, no debugging, just as share what everyone has opinions and suggestions, please reply to e-mail
Update
: 2025-01-16
Size
: 26kb
Publisher
:
zhangxi
ALTERA
Downloaded:0
altera Chinese manual device selection, the development of U.S. altera FPGA device used, then can
Update
: 2025-01-16
Size
: 690kb
Publisher
:
zhangxi
syn_tran
Downloaded:0
Synchronous transmission VHDL realize, I do not know everyone well. Hope you will like it
Update
: 2025-01-16
Size
: 683kb
Publisher
:
zhang
urisic
Downloaded:0
Use code to control urisc controllers, micro-code control unit realize
Update
: 2025-01-16
Size
: 3kb
Publisher
:
熊良鹏
LED
Downloaded:0
This procedure for XILINX SPARTEN-3E development board LED lights control, can realize the control rules have lights flashing.
Update
: 2025-01-16
Size
: 628kb
Publisher
:
何林军
ADC0809_VHDL
Downloaded:0
VHDL-based ADc0809 realize some simple function
Update
: 2025-01-16
Size
: 4kb
Publisher
:
代
lcdtest2
Downloaded:0
This procedure for XILINX SARTEN-3E development of the LCD control panel, you can control the LCD display.
Update
: 2025-01-16
Size
: 4.02mb
Publisher
:
何林军
leapyear
Downloaded:0
This procedure using HDL language to achieve a leap year of the judge, in the debug ISE8.21 through more suitable for beginners.
Update
: 2025-01-16
Size
: 73kb
Publisher
:
何林军
«
1
2
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.85
.86
.87
.88
.89
3990
.91
.92
.93
.94
.95
...
4311
»
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