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VHDL-FPGA-Verilog list
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FPGA using VHDL language realize the PWM output waveform, duty cycle controlled
Update : 2025-01-15 Size : 36kb Publisher : 王传辉

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Use of FPGA development board of the V4 produced electronic watches, the use of VHDL language
Update : 2025-01-15 Size : 1.06mb Publisher : 王传辉

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VHDL Language Design 8255 Parallel I/O interface chip
Update : 2025-01-15 Size : 1kb Publisher : weixj

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ADC0809 driver, after the experiment to accurate and reliable, practical
Update : 2025-01-15 Size : 1kb Publisher : chenyang

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Input clock 20M, the baud rate for 9600, Serial transceiver functions, by modifying the frequency of some other baud rate coefficient can realize the transceiver
Update : 2025-01-15 Size : 7kb Publisher : 杨启勇

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Have two, one with VHDL prepared I2C, a Verilog hdl languages
Update : 2025-01-15 Size : 502kb Publisher : sunstar

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Using FPGA to achieve the ADC sampler, using VHDL prepared 8-channel analog signal address, 8-bit data output
Update : 2025-01-15 Size : 122kb Publisher : 叶开

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The Verilog program runs on the FPGA to control the ADC. The control module provides the clock and control signals to complete the quantization and coding of analog signals.
Update : 2025-01-15 Size : 293kb Publisher : 叶开

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The design of OFDM systems in accordance with the actual needs of a computing using FPGA realize FFT program, and 64-point FFT as an example, in the Quartus II software through a comprehensive and simulation.
Update : 2025-01-15 Size : 27kb Publisher : 叶开

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This procedure for VERLOG HDL prepared with a full adder 3.
Update : 2025-01-15 Size : 1kb Publisher : liuwei

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quatus II environment realize RS232 VHDL functional
Update : 2025-01-15 Size : 427kb Publisher : 王艳华

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The function of implementing traffic lights with VHDL is very practical and I think it is better than other traffic light programs
Update : 2025-01-15 Size : 369kb Publisher : 郭海东
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