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VHDL-FPGA-Verilog list
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15 IP core, it is difficult to find things for a long time to find a thing
Update : 2025-01-15 Size : 2.52mb Publisher : peter

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Fixed-point division program, divided into dividend greater than the divisor and dividend both cases is greater than divisor
Update : 2025-01-15 Size : 18kb Publisher : 丁洋

EACF type FPGA experimental development board schematic diagram, China university of science and technology EDA laboratory @2007
Update : 2025-01-15 Size : 304kb Publisher : 达达幽

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Self-realization of the four-digit addition and multiplication procedures, it is good for VHDL programming
Update : 2025-01-15 Size : 2kb Publisher : 达达幽

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Fpga Compiler II+ Maxplus II Quick Start, quite good, with it, can quickly access to the VHDL world.
Update : 2025-01-15 Size : 1.81mb Publisher : 达达幽

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CPLD using a 80,383 emulation of CPU, is worth a reference, a rare
Update : 2025-01-15 Size : 231kb Publisher : 梁志洪

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CPLD simulation using 8051 nuclear, which has source code and description, the hard-won
Update : 2025-01-15 Size : 88kb Publisher : 梁志洪

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CPLD simulation using 8088 nuclear, which has source code and description can refer to
Update : 2025-01-15 Size : 270kb Publisher : 梁志洪

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controller can realize the Verilog language (even more language it? I do not know what the writing)
Update : 2025-01-15 Size : 34kb Publisher : 郑国栋

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Realize cache ping-pong, using Verilog language!
Update : 2025-01-15 Size : 162kb Publisher : zhl

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Verilog-HDL based on the rotor vibration noise voltage peak detector, it is worth learning ah,
Update : 2025-01-15 Size : 2.19mb Publisher : 王朱忠

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A DA converter implemented with fpga, with instructions and source code, VDHL files. A PLD Based delta-sigma DAC Delta-sigma modulation is the simple, yet powerful, Technique responsible for the extraordinary Performance
Update : 2025-01-15 Size : 57kb Publisher : 开心
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