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VHDL-FPGA-Verilog list
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THREEFLIFT
Downloaded:1
- the elevator controller design and analysis of the controller layer into three layers, and the elevator to floor stop request, after a second elevator door open, open the door indicator, open the door after 4 seconds,
Update
: 2025-01-15
Size
: 223kb
Publisher
:
梁浪风
uart_VHDL
Downloaded:0
UART section of VHDL procedures, can be used as reference
Update
: 2025-01-15
Size
: 10kb
Publisher
:
wangwei
QuartusII
Downloaded:0
Quartus II 6.0 Introduction Guide. Harbin Engineering University College of Information and Communication Engineering
Update
: 2025-01-15
Size
: 841kb
Publisher
:
zb
convert
Downloaded:0
With the COE file that generates ISE's IP kernel, some specific parameters should be set up by yourself!
Update
: 2025-01-15
Size
: 1kb
Publisher
:
1111
led
Downloaded:0
8 digital scanning display circuit design (VHDL) through compiler
Update
: 2025-01-15
Size
: 1kb
Publisher
:
hh
DDR2_module_VHDL_test(Rev0.1)
Downloaded:0
ddr 2 interface test module ddr 2 read and write interface to read and write test module
Update
: 2025-01-15
Size
: 123kb
Publisher
:
骑士
vhdl-core-Kopie_von_mem32_vhd
Downloaded:0
VHDL module nand flash control, the FPGA to realize the direct read and write control NAND FLASH.
Update
: 2025-01-15
Size
: 4kb
Publisher
:
骑士
memio
Downloaded:0
Latest VHDL modules to realize the control of SRAM can be directly used for ALTEAR XILLIX such as FPGA, the
Update
: 2025-01-15
Size
: 7kb
Publisher
:
骑士
newlin-pwm
Downloaded:0
VHDL source module can realize the most classic original PWM, which can be used for power supply and motor control
Update
: 2025-01-15
Size
: 1kb
Publisher
:
骑士
kuaijintuiyinyueshizhong_VHDL
Downloaded:0
The program is to simulate the clock program of the school; CLK - clock signal, RST - zero signal, set_en- school To signal, faster-- fast forward signal, slower-- quick exit signal, hour-- hour school, min-- minute scho
Update
: 2025-01-15
Size
: 110kb
Publisher
:
wang
dianziqin_VHDL
Downloaded:0
Autoplay octave flower design, contains detailed procedures, notes, schematics, etc.
Update
: 2025-01-15
Size
: 78kb
Publisher
:
wang
LEDhanzigundong_VHDL
Downloaded:0
This paper mainly discusses the use of EDA tools for the design of Chinese characters scrolling display technology. First, the description based on field programmable gate array (FPGA) hardware circuit and then studied i
Update
: 2025-01-15
Size
: 181kb
Publisher
:
wang
«
1
2
...
.14
.15
.16
.17
.18
4019
.20
.21
.22
.23
.24
...
4311
»
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