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VHDL-FPGA-Verilog list
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afifo
Downloaded:0
Asynchronous fifo of Verilog procedures, containing test platform
Update
: 2025-01-12
Size
: 2kb
Publisher
:
dq
xia_yuwen_verilog_PPT
Downloaded:0
BUAA Xiayu Verilong heard courseware, and Xia Yu Wen wrote Verilog Digital System Design Tutorial support
Update
: 2025-01-12
Size
: 502kb
Publisher
:
xiaotian
generic_fifos.tar
Downloaded:0
Generic FIFO, writen in verilog hdl
Update
: 2025-01-12
Size
: 12kb
Publisher
:
marco
SMS4_code
Downloaded:0
Using Verilog to achieve the first commercial cryptographic algorithm for encryption and decryption SMS4.
Update
: 2025-01-12
Size
: 204kb
Publisher
:
闫伟伟
freq_divider
Downloaded:0
A simple divider code, can be applied to other frequency sub-band
Update
: 2025-01-12
Size
: 1kb
Publisher
:
刘景轩
traffic_lamp
Downloaded:0
a program about traffic light demo.
Update
: 2025-01-12
Size
: 1kb
Publisher
:
刘景轩
Design_and_Test_VerilogHDL
Downloaded:0
Design and Test_Verilog HDL- EDA pioneer studio design and verification-Verilog HDL book with source code, many examples and has made it clear that it is rare to learn Verilog good information.
Update
: 2025-01-12
Size
: 1.8mb
Publisher
:
ZY
show
Downloaded:0
DE2 platform keying transmission, complete control of PC-keyboard, PS/2 transmission DE2 board to achieve the goal
Update
: 2025-01-12
Size
: 522kb
Publisher
:
samson
Verilog
Downloaded:0
FPGA verilog, better Verilog source code is now available to everyone, for reference
Update
: 2025-01-12
Size
: 41kb
Publisher
:
leedong
fifo_sync
Downloaded:0
Pulse synchronization circuit, a simple modification you can use, it is used.
Update
: 2025-01-12
Size
: 1kb
Publisher
:
NiosII
Downloaded:0
NiosII beginners Example containing characters mode device driver DMA transmission Example
Update
: 2025-01-12
Size
: 8kb
Publisher
:
郑先生
lzr
Downloaded:0
RISC computer design, verilog language,
Update
: 2025-01-12
Size
: 30.31mb
Publisher
:
«
1
2
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.93
.94
.95
.96
.97
4098
.99
.00
.01
.02
.03
...
4311
»
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