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VHDL-FPGA-Verilog list
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NIOS II IDE programming timer testing procedures, for information purposes only.
Update : 2025-01-06 Size : 390kb Publisher : 张建

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NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
Update : 2025-01-06 Size : 380kb Publisher : 张建

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NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
Update : 2025-01-06 Size : 386kb Publisher : 张建

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NIOS II programming IDE, FLASH testing procedures, for information purposes only.
Update : 2025-01-06 Size : 389kb Publisher : 张建

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generic VHDL code for memory, The Free Project VHDL IP Free-FIFO, Quartus standard library.
Update : 2025-01-06 Size : 23kb Publisher : Jawen

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SED1330/1335/1336/E1330 LCD controller and the source of 51 Series procedures. LCD procedures, and show pictures of Chinese characters.
Update : 2025-01-06 Size : 2kb Publisher : clg

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This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the panels and computer communications, can provide a reference source
Update : 2025-01-06 Size : 1kb Publisher : 华涛

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VHDL and FPGA prepared by the computer serial communication procedures and an LED procedures
Update : 2025-01-06 Size : 536kb Publisher : 黄鹏飞

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VHDL prepared decoding procedures that are simple to understand
Update : 2025-01-06 Size : 105kb Publisher : 黄鹏飞

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This is the use of the VHDL code lock preparation procedures for reference
Update : 2025-01-06 Size : 301kb Publisher : 黄鹏飞

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This is the use of VHDL prepared by the traffic lights procedures for the exchange of learning
Update : 2025-01-06 Size : 216kb Publisher : 黄鹏飞

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towards sin, cos trigonometry count VHDL code
Update : 2025-01-06 Size : 2kb Publisher : 王森
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