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VHDL-FPGA-Verilog list
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CummingsSNUG2002SJ_FIFO1
Downloaded:1
Simulation and Synthesis Techniques for Asynchronous FIFO Design
Update
: 2024-12-23
Size
: 118kb
Publisher
:
张卫
Coding Styles for if Statements and case Statement
Downloaded:0
Coding Styles for if Statements and case Statements
Update
: 2024-12-23
Size
: 25kb
Publisher
:
张卫
shifter
Downloaded:0
bidirectional use VHDL simulation environment shift register Segments-II, QUARTUS-
Update
: 2024-12-23
Size
: 146kb
Publisher
:
dm
CNT_24
Downloaded:0
use VHDL to achieve 24-hour counter, simple and practical method. Simulation environment Segments-
Update
: 2024-12-23
Size
: 47kb
Publisher
:
dm
pulse_change
Downloaded:0
use VHDL to achieve controllable pulse width of a simple process simulation environment Segments-
Update
: 2024-12-23
Size
: 179kb
Publisher
:
dm
7SegClock_HLD3
Downloaded:0
and ideally xinlinx 7 of the code led display program, and I hope to help you
Update
: 2024-12-23
Size
: 233kb
Publisher
:
王萌
Game_HLD3
Downloaded:0
xinlinx and they simply based on the small game and ideally the VHDL process, and I hope to help you!
Update
: 2024-12-23
Size
: 964kb
Publisher
:
王萌
Max232ForHLD3(20040913)(OK)
Downloaded:0
xinlinx and ideally serial communications VHDL process, and I hope to help you!
Update
: 2024-12-23
Size
: 453kb
Publisher
:
王萌
Mouse_HLD3
Downloaded:0
and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
Update
: 2024-12-23
Size
: 564kb
Publisher
:
王萌
Music_HLD3
Downloaded:0
and xinlinx ideally music player VHDL process, and I hope to help you!
Update
: 2024-12-23
Size
: 595kb
Publisher
:
王萌
usbsample
Downloaded:0
VHDL program for USB port based fpga and xinlinx ise, wish help for you!
Update
: 2024-12-23
Size
: 960kb
Publisher
:
王萌
datarom
Downloaded:0
the source for several sine ROM, has been compiled and passed, can be directly downloaded, not internal ROM containing sine table, the Acer ROM module
Update
: 2024-12-23
Size
: 238kb
Publisher
:
刘恒辉
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