VHDL-FPGA-Verilog List Page 474

VHDL-FPGA-Verilog list

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16x2_lcd_display_driver_latest.tar Downloaded：0: verilog prepared by the LCD controller，It can be used as the development of LCD
Update : 2025-01-20 Size : 2kb Publisher : 磊
my_sd_vga_test Downloaded：0: my_sd_vga_test, SD image file storage
Update : 2025-01-20 Size : 500kb Publisher : 磊
04_div_clk_1Hz Downloaded：0: this a divide circuit module to get a plus signal of 1Hz
Update : 2025-01-20 Size : 3.1mb Publisher : 刘年
08_counter_white Downloaded：0: this is a verilog file for counter
Update : 2025-01-20 Size : 2.96mb Publisher : 刘年
02_buzzer Downloaded：0: this is a verilog file to driver the buzzer
Update : 2025-01-20 Size : 2.99mb Publisher : 刘年
02_nonblocking_assignment Downloaded：0: this is a verilog HDL file for non blocking assignment.
Update : 2025-01-20 Size : 2.82mb Publisher : 刘年
zhuangtaiji Downloaded：0: Verilog an interesting state machine case, simple and easy to understand. Suitable for beginners. Is a small game, sparten board available. Inclusion test.
Update : 2025-01-20 Size : 470kb Publisher : 张家郡
test_rtls Downloaded：0: RTl hardware generation
Update : 2025-01-20 Size : 722kb Publisher : ayaz
usb Downloaded：0: usb2.0 vhdl
Update : 2025-01-20 Size : 1kb Publisher : rkl110
FPGA__source-code__Verilog Downloaded：0: Part of the basic functions of the source code for FPGA.Suitable for beginners to learn the simulation, the code readable, easy to understand, clear logic. Including triggers, full adder, divider, and parallel to serial
Update : 2025-01-20 Size : 1.82mb Publisher : 张秋爽
ethcomm Downloaded：0: FPGA Ethernet Communications Interface
Update : 2025-01-20 Size : 366kb Publisher : richard
state_machine Downloaded：0: Suitable for beginners.A simple state machine, there are eight state, digital tube output the serial number of the current state. Based on Mars- XC3S400-f experiment board
Update : 2025-01-20 Size : 1.42mb Publisher : 龙晓磊

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