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VHDL-FPGA-Verilog list
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log_verilog
Downloaded:0
Calculate log, verilog language using cordic method
Update
: 2024-12-23
Size
: 2.2mb
Publisher
:
罗十一
Hamming-ECC-master
Downloaded:0
HI THAT IS DOC AND CODE FOR HAMMING CODE
Update
: 2024-12-23
Size
: 30kb
Publisher
:
nano1
VGA
Downloaded:0
Under FPGA, VGA's simple display function is realized, implemented by Verilog, youtestbench code.
Update
: 2024-12-23
Size
: 19kb
Publisher
:
风彦
21ic下载_QuartusII中文教程.zip
Downloaded:0
A tutorial for learning FPGA
Update
: 2024-12-23
Size
: 2.97mb
Publisher
:
Animenzzz
altera_avalon_pwm
Downloaded:0
PWM module design based on nios2, compatible with Avalon bus structure
Update
: 2024-12-23
Size
: 42kb
Publisher
:
鱼在在藻
ob4
Downloaded:0
The realization of 0~99's cycle, pause, and zero function
Update
: 2024-12-23
Size
: 210kb
Publisher
:
一只狗子
数控液晶显示可调电源
Downloaded:0
The numerical control liquid crystal display adjustable power supply, has the very good study and the reference function.
Update
: 2024-12-23
Size
: 1.15mb
Publisher
:
雪年
8QAM-matlab程序
Downloaded:0
qam english ha he hello hi how are you i am fine thank you and you da ming tofu koungfu
Update
: 2024-12-23
Size
: 9kb
Publisher
:
iermeng
uart
Downloaded:0
The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.
Update
: 2024-12-23
Size
: 1.57mb
Publisher
:
木子桶
mux4_1
Downloaded:0
This is uploaded with Verilog language to achieve the four selection of a function of the source code.
Update
: 2024-12-23
Size
: 844kb
Publisher
:
木子桶
mic_leda
Downloaded:0
This upload is to achieve marquee function in Spartan 3E series development board above FPGA source code.
Update
: 2024-12-23
Size
: 5.07mb
Publisher
:
木子桶
paobiao
Downloaded:0
This is uploaded on the FPGA Spartan 3E series development board to achieve precise time, minute, seconds, 100 seconds of digital stopwatch Verilog source code.
Update
: 2024-12-23
Size
: 14.44mb
Publisher
:
木子桶
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