VHDL-FPGA-Verilog List Page 50

VHDL-FPGA-Verilog list

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test333333333 Downloaded：0: not tested yet but dont sownload. just tested code
Update : 2024-12-23 Size : 72kb Publisher : kal123
proj Downloaded：0: BCH coding and decoding of 15.k, thesis, project
Update : 2024-12-23 Size : 81kb Publisher : zhou9619
control_tube Downloaded：0: Define the LX6 series pin and implement the timer,
Update : 2024-12-23 Size : 375kb Publisher : VVDD
car_detect Downloaded：0: The number of vehicles in the parking lot can be obtained by detecting and recording vehicle entry and exit.
Update : 2024-12-23 Size : 39kb Publisher : 小明与小明
key_jitter_decade_counter_seg Downloaded：0: We use the recording of the jitter time to achieve the key dithering and record the number of keys.
Update : 2024-12-23 Size : 63kb Publisher : 小明与小明
posedge_detect Downloaded：0: The enabling signal is often a pulse. This program realizes the detection of the enabling signal
Update : 2024-12-23 Size : 72kb Publisher : 小明与小明
cnt4M Downloaded：0: 50M frequency divider
Update : 2024-12-23 Size : 1.54mb Publisher : xidianstudent
Verilog数字系统设计教程(第二版) 夏宇闻 Downloaded：0: A good tool book for Verilog language learning
Update : 2024-12-23 Size : 6.81mb Publisher : 走吧_hit
handshack Downloaded：0: Hold the simulation of mobile phone system, open with ISE14.7, Modelsim se6.5.
Update : 2024-12-23 Size : 69kb Publisher : 阿士大夫
dds Downloaded：0: DDS algorithm, call Xilinx IP, ISE
Update : 2024-12-23 Size : 5.46mb Publisher : 阿士大夫
FPGA教程 Downloaded：0: FPGA programming skills, very good
Update : 2024-12-23 Size : 10.78mb Publisher : bh_hh
SPI Downloaded：0: Using Verilog language to realize FPGA serial communication
Update : 2024-12-23 Size : 15kb Publisher : 柠檬琉璃夏

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