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VHDL-FPGA-Verilog list
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tlc549adc
Downloaded:0
FPGA use tlc549 AD converted digital display, suitable for digital control board.
Update
: 2025-01-22
Size
: 112kb
Publisher
:
李悦
clock
Downloaded:0
Original digital clock verilog procedures, to achieve the basic functions of digital clock, such as: counting, stopwatch, timer, alarm clock.
Update
: 2025-01-22
Size
: 222kb
Publisher
:
李悦
clock-for-nios
Downloaded:0
NiosⅡ digital clock design is based on, for a variety of FPGA development board, modify pin portable.
Update
: 2025-01-22
Size
: 413kb
Publisher
:
李悦
SD_Card_Audio
Downloaded:0
niosⅡ achieve audio literacy programs, including the entire project, all the files are not missing, ease of use, learning a good helper.
Update
: 2025-01-22
Size
: 1.19mb
Publisher
:
李悦
02_run_flash_led
Downloaded:0
In this experiment, we should above figure as the foundation, set up a parallel operation of flowing water light module. Scanning frequency configuration at 100 Hz, and each function module in a specific period of time,
Update
: 2025-01-22
Size
: 4.73mb
Publisher
:
杨军利
03_key_detect_1
Downloaded:0
Keyboard shaking Verilog implementation, the method of design is mainly by level examination module and 10 ms delay module combinatorial synthesis.
Update
: 2025-01-22
Size
: 2.98mb
Publisher
:
杨军利
LED
Downloaded:0
LED light water program, can realize frequency water, Ann 50 points frequency value of the file containing the necessary. V file, need to create your own specific project
Update
: 2025-01-22
Size
: 2kb
Publisher
:
mikegody
alarm_clock
Downloaded:0
Twenty-four hours hex To switch the alarm, time To achieve the adjustment time Adjust the time flashing function can be achieved in the corresponding position
Update
: 2025-01-22
Size
: 10.4mb
Publisher
:
李威
uart
Downloaded:0
With Verilog HDL, FPGA serial debugger implemented in hardware debugging has been successful
Update
: 2025-01-22
Size
: 3.23mb
Publisher
:
ruanguopqing
ethmac10g_latest.tar
Downloaded:0
ethmac10g_latest is written in verilog 10gbps Ethernet mac, very useful for the development of the project!
Update
: 2025-01-22
Size
: 771kb
Publisher
:
hezigang
can_latest.tar
Downloaded:0
Written by verilog can bus controller, including the design reference course and simulation program, and the development of the document!
Update
: 2025-01-22
Size
: 1.12mb
Publisher
:
hezigang
nysa_sata_latest.tar
Downloaded:0
Mac controller is based on SATA erilog prepared, including the reception, transmission control and other functions to read and write!
Update
: 2025-01-22
Size
: 50kb
Publisher
:
hezigang
«
1
2
...
.12
.13
.14
.15
.16
517
.18
.19
.20
.21
.22
...
4311
»
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