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VHDL-FPGA-Verilog list
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ex7_vga
Downloaded:0
this code is designed to drive the VGA and the effiency is 1024x768
Update
: 2025-01-21
Size
: 1.71mb
Publisher
:
张绍龙
cache
Downloaded:0
Verilog language to write a cache Platform is ISE xillix The processing of the instruction hit and the missing the cache is realized.
Update
: 2025-01-21
Size
: 618kb
Publisher
:
泡温泉
NIOSII_VGA_Controller
Downloaded:0
Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying th
Update
: 2025-01-21
Size
: 58kb
Publisher
:
Mr
DE0_development_board_cd_data
Downloaded:0
This is DE0 development board disc material, is friend chip of altera company Cyclone III development board.
Update
: 2025-01-21
Size
: 15.89mb
Publisher
:
吴超
ADS1118
Downloaded:0
The design is based on a program EP4CE15F17C8N and ADS1118 ADC data acquisition and display of 12864
Update
: 2025-01-21
Size
: 315kb
Publisher
:
陈
ADS8323
Downloaded:0
The design is based on a program EP4CE15F17C8N and ADS8323 16-bit ADC data acquisition and display of 12864
Update
: 2025-01-21
Size
: 615kb
Publisher
:
陈
DAC(tlv5616)
Downloaded:0
The design is based on a program of 12 EP4CE15F17C8N and TLV5616 DAC analog to digital conversion and display of 12864
Update
: 2025-01-21
Size
: 731kb
Publisher
:
陈
DAC(tlv5618)
Downloaded:0
The design is based on a program EP4CE15F17C8N and TLV5618 Dual 12-bit DAC analog to digital conversion and display of 12864
Update
: 2025-01-21
Size
: 1001kb
Publisher
:
陈
adc0804
Downloaded:0
This a classic ad sensor driver code 0804, the modulated available and really is very classic
Update
: 2025-01-21
Size
: 429kb
Publisher
:
lihui
sdram_test
Downloaded:0
This a classic sdram driver code, you may need to pay attention to the specific chip model, which I have introduced in the modulated available and really is very classic
Update
: 2025-01-21
Size
: 2.44mb
Publisher
:
lihui
myfpga
Downloaded:0
This a classic of the relevant multiplier divider FPGA code, as well as other available information, are saved on the network, and really is very classic
Update
: 2025-01-21
Size
: 893kb
Publisher
:
lihui
SegLed_DynamDisp
Downloaded:0
This a traditional fpga entry code on the digital control of the driver code, very suitable for novices to learn
Update
: 2025-01-21
Size
: 3.27mb
Publisher
:
lihui
«
1
2
...
.09
.10
.11
.12
.13
514
.15
.16
.17
.18
.19
...
4311
»
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