Description: UART interface is widely used in the procedures and information to adjust the output. This experiment will introduce self-UART interface and debugging example, through these two examples to grasp the UART design methods and the use of HyperTerminal.
- [uartok] - Serial communication written by verilog
- [uart_verilog_v1] - UART d Verilog procedures can be achieve
- [Modelsimguidanceontheplane.Rar] - a modelsim explain in detail the operati
- [USBXilinx] - a serial communication interface of all
- [UART] - UART_verilog, designed to send and recei
- [uart] - Using Verilog realization of serial asyn
- [uart] - An FPGA using Verilog realization of the
- [BAS] - vb Total Station data communications, vb
- [UART] - Input clock 20M, the baud rate for 9600,
- [rs232] - fpga serial read and write procedures, b
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