Description: UART simple state machine to prepare, as a curriculum design information, suitable for entry-
- [uart2] - UART Universal Asynchronous Receiver and
- [SPI_Core.ZIP] - SPI agreement VHDL/Verilog language.
- [uart_tran] - Verilog UART serial transmission of the
- [UART] - Serial experiments, very good, and I sti
- [usb11] - Verilog HDL based on a USB 1.1 of the IP
- [uart8] - Libero provided the use of asynchronous
- [UART] - UART is a widely used short-range, low-s
- [uart] - UART prepared Verilog source code. Succe
- [UART(FPGA)] - Based on field programmable logic device
- [UART-EDA] - This a very classic asynchronous transce
File list (Check if you may need any files):
uart
....\receiver.v
....\receiver.v.bak
....\receiver2.v
....\receiver2.v.bak
....\test.v
....\test.v.bak
....\test2.v
....\test2.v.bak
....\test3.v
....\test3.v.bak
....\transcript
....\transmitter.v
....\transmitter.v.bak
....\transmitter2.v
....\transmitter2.v.bak
....\uart.cr.mti
....\uart.mpf
....\uart.mpf.bak
....\uart.vcd
....\vsim.wlf
....\work
....\....\receiver
....\....\........\verilog.asm
....\....\........\_primary.dat
....\....\........\_primary.vhd
....\....\receiver2
....\....\.........\_primary.dat
....\....\.........\_primary.vhd
....\....\testbench1
....\....\..........\verilog.asm
....\....\..........\_primary.dat
....\....\..........\_primary.vhd
....\....\testbench2
....\....\..........\verilog.asm
....\....\..........\_primary.dat
....\....\..........\_primary.vhd
....\....\testbench3
....\....\..........\_primary.dat
....\....\..........\_primary.vhd
....\....\transmitter
....\....\...........\verilog.asm
....\....\...........\_primary.dat
....\....\...........\_primary.vhd
....\....\transmitter2
....\....\............\_primary.dat
....\....\............\_primary.vhd
....\....\_info
....\....\_opt
....\....\....\work_receiver_fast.asm
....\....\....\work_receiver_fast.dt2
....\....\....\work_testbench1_fast.asm
....\....\....\work_testbench1_fast.dt2
....\....\....\work_transmitter_fast.asm
....\....\....\work_transmitter_fast.dt2
....\....\....\work__info
....\....\....\_deps
....\....\_opt1
....\....\.....\work_receiver_fast.asm
....\....\.....\work_receiver_fast.dt2
....\....\.....\work_testbench3_fast.asm
....\....\.....\work_testbench3_fast.dt2
....\....\.....\work_transmitter_fast.asm
....\....\.....\work_transmitter_fast.dt2
....\....\.....\work__info
....\....\.....\_deps
....\....\_opt2
....\....\.....\work_receiver2_fast.asm
....\....\.....\work_receiver2_fast.dt2
....\....\.....\work_testbench2_fast.asm
....\....\.....\work_testbench2_fast.dt2
....\....\.....\work_transmitter2_fast.asm
....\....\.....\work_transmitter2_fast.dt2
....\....\.....\work__info
....\....\.....\_deps
....\....\_temp
UART_何翌成_082828.doc
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