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Title: CIC_deci4 Download
 Description: CIC decimation by 4 filter,used in Direct RF sampling of GPS signal. the core dsp block in a frondend design
 Downloaders recently: [More information of uploader mimida.buda]
  • [cic] - Verilog code written by CIC filter proce
  • [v4] - Xilinx company official Virtex4 FPGA eva
  • [c19_CICfilter] - Proficient in verilog HDL source languag
  • [cic512] - 5-order CIC filter, collected 12 times t
  • [DDC] - Verilog language implementation of the d
  • [up_convert] - vhdl hardware design on the realization
  • [verilog_FPGA_DDC] - This a verilog HDL used to achieve the r
  • [DUC] - SFF platform based on software radio, us
File list (Check if you may need any files):
CIC_deci4_second
................\cic2_by4_compiler_v1_0.ngc
................\cic2_by4_compiler_v1_0.vhd
................\cic2_by4_compiler_v1_0.vho
................\cic2_by4_compiler_v1_0.xco
................\cic2_by4_compiler_v1_0_flist.txt
................\cic2_by4_compiler_v1_0_readme.txt
................\cic2_by4_compiler_v1_0_xmdf.tcl
    

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