Description: Quartus joint simulation with MATLAB to generate rom table,
- [dds_quicklogic] - QuickLogic Corporation This is a direct
- [1] - How to use Matlab to create Quartus simu
- [DDS] - SIMULINK with MATLAB tools in DDS realiz
- [Verilog] - DDS, FPGA generated using Verilog langua
- [CORDIC_ATAN] - Verilog language used to complete based
- [VHDL-ROM4] - ROM-based design of the sine wave genera
- [Quartus] - Quartus Ⅱ introduced document creation s
- [LFSR] - verilog to achieve 8-order pseudo-random
File list (Check if you may need any files):
ug_memrom.pdf