pll_verilog All-Digital Phase-Locked Loop verilog - CodeBus

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VHDL-FPGA-Verilog

Title: pll_verilog

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
1kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
issaczhy

Description: All-Digital Phase-Locked Loop verilog source code, simulation has passed

Downloaders recently: [More information of uploader issaczhy]

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File list (Check if you may need any files):

pll_verilog.v

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