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Title: viterbi Download
 Description: Hard decision viterbi decoding in hardware, through the verilog language. A retrospective approach. Back depth is 16.
 Downloaders recently: [More information of uploader Fengxiaodong]
 To Search: ACS verilog viterbi vhdl Viterbi Verilog viterbi
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File list (Check if you may need any files): 
viterbi\acs.v
.......\acs.v.bak
.......\branch_metric.v
.......\branch_metric.v.bak
.......\decoder.v
.......\decoder.v.bak
.......\dec_bit.txt
.......\info_bit.txt
.......\mem_ctrl.v
.......\mem_ctrl.v.bak
.......\output_v.txt
.......\rec_code.txt
.......\testbench.v
.......\testbench.v.bak
.......\top_core.v
.......\top_core.v.bak
.......\trace_back.v
.......\trace_back.v.bak
.......\viterbi.cr.mti
.......\viterbi.mpf
.......\vsim.wlf
.......\work\acs\verilog.asm
.......\....\...\verilog.rw
.......\....\...\_primary.dat
.......\....\...\_primary.dbs
.......\....\...\_primary.vhd
.......\....\branch_metric\verilog.asm
.......\....\.............\verilog.rw
.......\....\.............\_primary.dat
.......\....\.............\_primary.dbs
.......\....\.............\_primary.vhd
.......\....\decoder\verilog.asm
.......\....\.......\verilog.rw
.......\....\.......\_primary.dat
.......\....\.......\_primary.dbs
.......\....\.......\_primary.vhd
.......\....\mem_ctrl\verilog.asm
.......\....\........\verilog.rw
.......\....\........\_primary.dat
.......\....\........\_primary.dbs
.......\....\........\_primary.vhd
.......\....\testbench\verilog.asm
.......\....\.........\verilog.rw
.......\....\.........\_primary.dat
.......\....\.........\_primary.dbs
.......\....\.........\_primary.vhd
.......\....\.op_core\verilog.asm
.......\....\........\verilog.rw
.......\....\........\_primary.dat
.......\....\........\_primary.dbs
.......\....\........\_primary.vhd
.......\....\.race_back\verilog.asm
.......\....\..........\verilog.rw
.......\....\..........\_primary.dat
.......\....\..........\_primary.dbs
.......\....\..........\_primary.vhd
.......\....\_info
.......\....\.temp\vlog09dt69
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