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[Other resourcelvds

Description: 本人正在学习vhdl语言,买了套开发板,这些是配套光盘里的内容,非常难得,网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
Platform: | Size: 2737 | Author: 孙强 | Hits:

[VHDL-FPGA-Veriloglvds

Description: 本人正在学习vhdl语言,买了套开发板,这些是配套光盘里的内容,非常难得,网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
Platform: | Size: 2048 | Author: 孙强 | Hits:

[VHDL-FPGA-Verilogio_lvds

Description: 基于VHDL语言的低压差分接口规范的实现-Based on the VHDL language, Low Voltage Differential Interface Specification realization
Platform: | Size: 133120 | Author: 赵杰 | Hits:

[VHDL-FPGA-Verilogdiff_io_top

Description: LVDS的应用的Verilog HDL例子程序,由altera公司提供。-LVDS Application of Verilog HDL examples of procedures provided by the altera.
Platform: | Size: 527360 | Author: wangyunshann | Hits:

[VHDL-FPGA-VerilogLVDS

Description: 以LVDS设计为例学习ISE中的时序分析以及低层布局器的使用方法 在底层布局器中对LVDS管脚进行约束的方法,底层布局器设计流程,底层布局器中的位置约束,时序分析器的使用方法,时序改进向导的使用等.-LVDS design for example to study the timing analysis ISE as well as the use of low-level device layout method in the bottom of the layout of LVDS device pin to bound methods, the bottom of the layout design flow, the underlying device layout position constraints, timing analyzer use timing to improve the use of the wizard.
Platform: | Size: 129024 | Author: 程凯 | Hits:

[OtherLVDS

Description: 关于lvds的详细介绍和讨论,非常适合初学者使用-LVDS details on the presentations and discussions, is very suitable for beginners to use
Platform: | Size: 89088 | Author: 周洲 | Hits:

[Special Effectsxapp485

Description: XILINX公司关于平板显示"LVDS接收"的参考设计,已经过验证非常成熟,用于使用FPGA来做图象增强,Gamma校正,动态背光控制等的设计! -XILINX company on the flat panel display
Platform: | Size: 2361344 | Author: Ray Luo | Hits:

[VHDL-FPGA-Verilogio_lvds

Description: xilinx LVDS接口程序,xilinx LVDS接口程序-xilinx LVDS interface program,xilinx LVDS interface program
Platform: | Size: 124928 | Author: s | Hits:

[File FormatLVDS

Description: 很多液晶屏都具有LVDS接口,本文对液晶屏的各种LVDS接口定义进行了详细说明。-Have a lot of LCD LVDS interface, this article on the various LVDS LCD interface definition described in detail.
Platform: | Size: 4096 | Author: 刘先生 | Hits:

[VHDL-FPGA-VerilogLVDS_Serdes_list_FPGA1

Description: FPGA之间的LVDS传输,采用serdes接口,传输速率达到400m-LVDS transmission between the FPGA using serdes interface, transfer rate up to 400m
Platform: | Size: 14338048 | Author: linpingping | Hits:

[VHDL-FPGA-VerilogLVDS_DDR_List_FPGA2

Description: FPGA芯片与ADI公司的AD9779之间的通信,总共有四个通道,68对LVDS,采样时钟是122.88MHz-FPGA chips ADI' s AD9779 and communication between, a total of four channels, 68 pairs of LVDS, the sampling clock is 122.88MHz
Platform: | Size: 808960 | Author: linpingping | Hits:

[VHDL-FPGA-Verilogxapp622

Description: 644 MHz SDR LVDS 发射器/接收器(verilog and doc)-644-MHz SDR LVDS Transmitter/Receiver
Platform: | Size: 355328 | Author: wicky | Hits:

[VHDL-FPGA-Verilogxapp860

Description: 16通道DDR的LVDS接口(VHDL,Verilog and doc)-16-Channel, DDR LVDS Interface with Real-Time Window Monitoring
Platform: | Size: 650240 | Author: wicky | Hits:

[Data structshdl

Description: 对lvds的结构用verilog和vhdl代码进行了详细的描述-The structure of the lvds with verilog and vhdl code described in detail
Platform: | Size: 21504 | Author: LUCAS | Hits:

[OtherLPM

Description: LPM 是参数可设置模块库Library of Parameterized Modules 的英语缩写,Altera 提供的 可参数化宏功能模块和LPM 函数均基于Altera 器件的结构做了优化设计。在许多实用情况 中,必须使用宏功能模块才可以使用一些Altera 特定器件的硬件功能。例如各类片上存储 器、DSP 模块、LVDS 驱动器、嵌入式PLL 以及SERDES 和DDIO 电路模块等等。这些可 以以图形或硬件描述语言模块形式方便调用的宏功能块,使得基于EDA 技术的电子设计的 效率和可靠性有了很大的提高。设计者可以根据实际电路的设计需要,选择LPM 库中的适 当模块,并为其设定适当的参数,就能满足自己的设计需要,从而在自己的项目中十分方 便地调用优秀的电子工程技术人员的硬件设计成果。 LPM 功能模块内容丰富,每一模块的功能、参数含义、使用方法、硬件描述语言模块 参数设置及调用方法都可以在QuartusⅡ中的Help 中查阅到,方法是选择“Help”菜单中 的“Megafunctions/LPM”命令。-LPM
Platform: | Size: 1526784 | Author: lidandan | Hits:

[VHDL-FPGA-Veriloglvds

Description: 文章介绍了lvds技术在硬件设计中的原理和应用,先已被广泛应用-This paper introduces lvds in hardware design and application of the principle, first has been widely used
Platform: | Size: 89088 | Author: wang | Hits:

[VHDL-FPGA-VerilogLIP1401CORE_IO_LVDS

Description: IO LVDS VHDL & Verilog code
Platform: | Size: 35840 | Author: jc | Hits:

[VHDL-FPGA-Verilog7_1LVDS_serilizer

Description: 7:1LVDS编码 为LVDS方面需求的人提供参考设计,很高兴- This VHDL or Verilog source code is intended as a design reference which illustrates how these types of functions can be implemented. It is the user s responsibility to verify their design for consistency and functionality through the use of formal verification methods.
Platform: | Size: 1024 | Author: 大方的 | Hits:

[VHDL-FPGA-VerilogLVDS

Description: 从20MHz的LVDS信号读数据 仅供参考-LVDS signals from 20MHz to read data for reference only
Platform: | Size: 110592 | Author: Domo | Hits:

[VHDL-FPGA-VerilogLVDS-Application

Description: 硬件编程语言说明,很好的pdf文档,可以用于查阅,很方便vhdl-Hardware description languages, a good pdf documents, can be used for access, it is easy to vhdl
Platform: | Size: 2171904 | Author: qust | Hits:
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