Description: 这是一个将HDLC协议运用到串口通信的程序源码,很有参考价值,感兴趣的朋友可以讨论一下!-This is a use of HDLC protocol to the serial communication procedures source, was useful and interesting friends can discuss! Platform: |
Size: 727040 |
Author: |
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Description: wishbone总线协议详细的技术说明文挡!-wishbone bus protocol detailed technical description of the text block! Platform: |
Size: 1342464 |
Author: |
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Description: 讲解USB接口原理:
USB通信基本知识概要
USB的通讯协议
USB模块的编程方法 -USB interface on the principle : USB Communication outline basic knowledge of USB communication protocol modules USB Programming Platform: |
Size: 92160 |
Author: |
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Description: umti协议中的usb1.1的verilog原文件,可公实现usb2.0做参考-umti the agreement usb1.1 verilog the original documents, the public can refer to achieve usb2.0 Platform: |
Size: 10240 |
Author:liuzefu |
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Description: 该工程是基于verilog hdl 语言编写的帧传输协议HDLC帧的发送端代码,会用QUATUSII的人都应该知道如何使用,希望能给你带来帮助-The project is based on the language verilog hdl frame transmission protocol HDLC frame of this generation- Codes will be used QUATUSII people should know how to use, in the hope of giving you helpful Platform: |
Size: 382976 |
Author:何丹萍 |
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Description: HDLC协议是目前广泛使用的电信协议。本文详细介绍使用方法。-HDLC protocol is widely used in telecommunications protocols. This paper describes the use of methods. Platform: |
Size: 555008 |
Author:siweidong |
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Description: 用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine Platform: |
Size: 1570816 |
Author:一王 |
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Description: CRC校验串行实现方法,verilog源码,利用反馈线性移位寄存器的方法,实现简单,适用于串行通信协议中的CRC校验.-CRC checksum method of serial realize, verilog source code, the use of linear feedback shift register method, the realization of simple serial communication protocol for the CRC checksum. Platform: |
Size: 1024 |
Author:徐亮 |
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Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200. Platform: |
Size: 5120 |
Author:陈想 |
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Description: HDLC控制协议中CRC校验码算法代码,为CRC16,Verilog语言-HDLC Control Protocol Code in the CRC checksum algorithm code for CRC16, Verilog language Platform: |
Size: 1024 |
Author:刘彻 |
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Description: uart异步串口通信协议的源代码,用vhdl语言编写,并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file Platform: |
Size: 10240 |
Author:阿军 |
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Description: 用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机。-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine. Platform: |
Size: 1571840 |
Author:霍飘摇 |
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