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Search - core verilog - List
[
VHDL-FPGA-Verilog
]
Free ARM-7 Core (Verilog) 可跑 uClinux
DL : 2
一个 Free 的 ARM-7 Core,是使用 Verilog 编成,综合后占用资源小,可以执行 uClinux 等程序或系统,内附详细说明的 PDF 档及源码 Verilog 编程等.
Update
: 2011-07-14
Size
: 4.23mb
Publisher
:
xyz543
[
VHDL-FPGA-Verilog
]
two_d_dct_serial
DL : 1
altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码,语言是:verilog 性能不错,不过资源消耗有点大,可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be used to transform learning polynomial algorithm DCT
Update
: 2025-02-17
Size
: 24kb
Publisher
:
猪猪
[
VHDL-FPGA-Verilog
]
verilog SDRAM core
DL : 1
我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
Update
: 2025-02-17
Size
: 27kb
Publisher
:
于飞
[
VHDL-FPGA-Verilog
]
t80
DL : 0
Configurable cpu core that supports Z80, 8080 and gameboy instruction sets
Update
: 2025-02-17
Size
: 41kb
Publisher
:
吴毅
[
VHDL-FPGA-Verilog
]
video_from_opencore
DL : 0
全电视信号编码器,verilog的,看看有借鉴价值否?-video signal encoder, Verilog, to see whether the reference value?
Update
: 2025-02-17
Size
: 149kb
Publisher
:
12
[
ARM-PowerPC-ColdFire-MIPS
]
ARM_Core
DL : 0
arm verilog hdl ip core-arm Verilog HDL core ip
Update
: 2025-02-17
Size
: 69kb
Publisher
:
lile
[
CSharp
]
avr_core2_VHDL
DL : 0
avr core verilog for asic design
Update
: 2025-02-17
Size
: 82kb
Publisher
:
杰克
[
VHDL-FPGA-Verilog
]
8051core-Verilog
DL : 0
8051的源代码-8051 source code
Update
: 2025-02-17
Size
: 102kb
Publisher
:
飞鹰
[
SCM
]
8051-core
DL : 0
8051单片机是一种应用最广泛的单片机.它的内核设计非常精简,这是用Verilog硬件描述语言写的8051单片机内核-8051 is a most widely used SCM. Its kernel design has been streamlined, This is used Verilog hardware description language to write the 8051 microcontroller core
Update
: 2025-02-17
Size
: 51kb
Publisher
:
王二
[
VHDL-FPGA-Verilog
]
8051core-Verilog
DL : 0
利用verlilog hdl语言编程,完成了8051内核,非常值得学习硬件描述语言的人看看!-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!
Update
: 2025-02-17
Size
: 52kb
Publisher
:
小方
[
Other Embeded program
]
8051core-Verilog
DL : 0
这里有verilog编写的8051ipcore 谁要啊?-Verilog prepared here has 8051ipcore who ah?
Update
: 2025-02-17
Size
: 52kb
Publisher
:
韩雪
[
OS Develop
]
8051core-Verilog
DL : 0
verilog 描述8051core参考学习用
Update
: 2025-02-17
Size
: 61kb
Publisher
:
方毛
[
VHDL-FPGA-Verilog
]
deinter
DL : 0
deinterlace的核心verilog,-deinterlace core verilog,
Update
: 2025-02-17
Size
: 15kb
Publisher
:
zhang chi
[
VHDL-FPGA-Verilog
]
51core-Verilog
DL : 0
8051core-Verilog编写,可修改-8051core-Verilog prepared to modify
Update
: 2025-02-17
Size
: 51kb
Publisher
:
will
[
SCM
]
8051core-Verilog
DL : 0
VERILOG编写的80C51单片机内核程序-Verilog prepared 80C51 single-chip core procedures
Update
: 2025-02-17
Size
: 51kb
Publisher
:
陈金冲
[
VHDL-FPGA-Verilog
]
Ethernet_verilog_ip_core
DL : 0
Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核,对学习verilog语言和以太网有很大帮助。-Ethernet (Ethernet) verilog ip core language used verilogHDL Ethernet soft-core, learning Verilog language and Ethernet are very helpful.
Update
: 2025-02-17
Size
: 882kb
Publisher
:
houlongting
[
Embeded-SCM Develop
]
niosii_vga_ref_des
DL : 0
VGA核的verilog实现,能用于NIOS2的avalon总线-VGA core Verilog realize, can be used to NIOS2 the avalon bus
Update
: 2025-02-17
Size
: 603kb
Publisher
:
李永杰
[
Other
]
EHERNETIPcore
DL : 0
该文件包含以太网IP核的相关代码,一共包含24个VERILOG源代码-This document contains the relevant Ethernet IP core code, a total of 24 includes Verilog source code
Update
: 2025-02-17
Size
: 68kb
Publisher
:
season
[
VHDL-FPGA-Verilog
]
10100MIP
DL : 0
以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码,可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
Update
: 2025-02-17
Size
: 723kb
Publisher
:
打狗队
[
VHDL-FPGA-Verilog
]
ethernet10-100M-IP-core
DL : 0
以太网10-100M IP核Verilog源码,可综合-Ethernet 10-100M IP core Verilog source code can be integrated
Update
: 2025-02-17
Size
: 723kb
Publisher
:
owen
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