Search - cpld pwm

[Other resource] cpld-pwm

Description: 基于cpld的pwm控制设计采用vhdl.verilog语言设计对大家比较有用
Platform: | Size: 79764 | Author: emily | Hits:

[MiddleWare] pwm_VerilogHDLV1.1

Description: 本软件在CPLD上实现数字PWM控制，用Verilog HDL语言编写，在MAX　ＰＬＵＳ　ＩＩ调试成功，可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
Platform: | Size: 232448 | Author: wjz | Hits:

[VHDL-FPGA-Verilog] cpldPWM

Description: verilog HDL 编写的PWM，是初学CPLD者入门Z资源，epm7128stc100-10-verilog HDL prepared by the PWM, is a novice CPLD Getting Started Z resources, epm7128stc100-10
Platform: | Size: 236544 | Author: 章风 | Hits:

[VHDL-FPGA-Verilog] vcpwmcpldcar

Description: vc++与vhdl代码,cpld接受pc串口指令,输出pwm信号控制伺服电机.双通道,各128级.使用了扩展ascii码-vc++ with VHDL code, cpld accept pc serial commands, the output pwm signal to control servo motor. dual-channel, the 128. the use of extended ascii code
Platform: | Size: 959488 | Author: hxf | Hits:

[Embeded-SCM Develop] g

Description: 这是一个关于基于CPLD的多路SPWM控制器的研制的论文，请大家多多下载，顶起来-This is a matter of CPLD-based multi-channel SPWM Controller papers, please download a lot, top up
Platform: | Size: 4814848 | Author: 将建 | Hits:

[VHDL-FPGA-Verilog] cpld-pwm

Description: 基于cpld的pwm控制设计采用vhdl.verilog语言设计对大家比较有用-CPLD-based control design uses the pwm design vhdl.verilog language more useful for everyone
Platform: | Size: 79872 | Author: emily | Hits:

[VHDL-FPGA-Verilog] CpldVhdl

Description: 用VHDL语言写的程序包含如下功能：1.键盘扫描2.控制AD转换3.产生PWM信号与51系列CPU接口，接在51地址数据总线上，单片机通过访问地址总线上的数据寄存器来控制CPLD-VHDL language used to write the procedure that contains the following functions: 1. Keyboard scan 2. Control of AD converters 3. Generate PWM signals with the 51 series CPU interface, and then in the address data bus 51, the single-chip by visiting the address bus data Register to control the CPLD
Platform: | Size: 455680 | Author: liubaogui | Hits:

[VHDL-FPGA-Verilog] CPLD_PWM

Description: 一个在CPLD，EPM70128上实现的PWM控制源程序。-A CPLD, EPM70128 realize the PWM control on the source.
Platform: | Size: 247808 | Author: 路伟希 | Hits:

[VHDL-FPGA-Verilog] PWMtest

Description: 利用VHDL实现CPLD（EMP240T100C5）的PWM输出-Using VHDL realize CPLD (EMP240T100C5) of the PWM output
Platform: | Size: 174080 | Author: ZXQ | Hits:

[VHDL-FPGA-Verilog] CPLD_Design_50

Description: CPLD实用设计50例，非常经典的CPLD设计，包含50个实际的典型应用，涉及直流电机PWM驱动，编码等内容，有了这50例，举一反三，就会了很多应用-50 cases of practical CPLD design, very classic CPLD design, including 50 typical practical applications, involving PWM DC motor driver, coding, etc., with these 50 cases, giving top priority will be a lot of applications
Platform: | Size: 7625728 | Author: 刘工 | Hits:

[VHDL-FPGA-Verilog] pwm

Description: 实现PWM波型....使用VHDL语言-Realization of PWM waveform using the VHDL language ....
Platform: | Size: 370688 | Author: xxj | Hits:

[VHDL-FPGA-Verilog] an501_design_example

Description: PWM文件用于CPLD，学习如何用VHDL语言写程序-PWM files for CPLD, learn how to write VHDL language program
Platform: | Size: 285696 | Author: xiaox | Hits:

[Software Engineering] cpldpwm

Description: cpld的PWM输出控制，初学cpld良好例程-CPLD output of PWM control, a good beginner routine CPLD
Platform: | Size: 60416 | Author: 做人要厚道 | Hits:

[VHDL-FPGA-Verilog] Pulse_Width_Modulator_Altera_MAX_II_CPLD_Design_E

Description: Example VHDL project showing how to use a PWM by CPLD
Platform: | Size: 290816 | Author: maros | Hits:

[VHDL-FPGA-Verilog] transfer

Description: 基于CPLD的PWM波形的发生器，编程语言为verilog,开发环境为QuartusII.-The CPLD-based PWM waveform generator, the programming language to verilog, development environment for QuartusII.
Platform: | Size: 2048 | Author: ouyangyajuan | Hits:

[Software Engineering] pwm

Description: 整个系统以CPLD为核心逻辑控制器件，配以外围测试及试验电路：显示、时钟信号产生电路、蜂鸣器电路和ByteBlaster的数据变换电路，构成正负脉宽数控调制信号发生器。基于CPLD逻辑控制器件构成的正负脉宽数控调制信号发生器是一个单片系统,整个PWM信号控制所需的各种功能都可由CPLD来实现。-The entire system to the core logic control CPLD devices, together with the external test and the test circuit: display, clock signal generation circuit, buzzer circuit and ByteBlaster data converter, NC constitute positive and negative pulse width modulated signal generator. CPLD logic control device based on the positive and negative pulse width modulation signal generator is a numerical control system on chip, the PWM signals control the various functions required by the CPLD can be achieved.
Platform: | Size: 250880 | Author: 唐慧 | Hits:

[Other] Pwm

Description: cpld的ＰＷＭ产生电路，可以进行ＩＧＢＴ的控制，从而控制电机的运行速度，扭距-cpld the PWM generation circuit, IGBT can control, to control motor speed, torque
Platform: | Size: 102400 | Author: qz070 | Hits:

[VHDL-FPGA-Verilog] Pulse_Width_Modulator_Altera_MAX_II_CPLD_Design_Ex

Description: 来自于ALTERA官方网站。本文档详细介绍怎样利用MAX® II CPLD 来实现脉冲宽度调制(PWM)。本设计还利用了MAX II CPLD 的内部用户闪存振荡器，不需要采用专门的外部时钟。附有verilog源程序。-From ALTERA website. This document details how to use the MAX ® II CPLD to implement pulse width modulation (PWM). This design also uses the MAX II CPLD' s internal oscillator user flash memory, without using a special external clock. With verilog source.
Platform: | Size: 291840 | Author: 无小品 | Hits:

[VHDL-FPGA-Verilog] cpld

Description: 基于CPLD的PWM信号发生器，产生占空比可调的PWM波。-cpld pwm
Platform: | Size: 891904 | Author: 于洋 | Hits:

[SCM] cpld

Description: DSEM电机驱动控制程序，包括其所处位置判读，PWM产生(Control of DSEM machine)
Platform: | Size: 1287168 | Author: 一个小恶魔 | Hits:

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