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[VHDL-FPGA-Verilog] 基于FPGA的直接数字合成器设计

Description: 1、 利用FLEX10的片内RAM资源，根据DDS原理，设计产生正弦信号的各功能模块和顶层原理图； 2、 利用实验板上的TLC7259转换器，将1中得到的正弦信号，通过D/A转换，通过ME5534滤波后在示波器上观察； 3、 输出波形要求： 在输入时钟频率为16KHz时，输出正弦波分辨率达到1Hz； 在输入时钟频率为4MHz时，输出正弦波分辨率达到256Hz； 4、 通过RS232C通信，实现FPGA和PC机之间串行通信，从而实现用PC机改变频率控制字，实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D/A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
Platform: | Size: 21504 | Author: 竺玲玲 | Hits:

[Static control] ipcore51

Description: 51核，用VHDL编写，通过FPGA验证-51 nuclear, prepared with VHDL, FPGA verification
Platform: | Size: 977920 | Author: 汪平 | Hits:

[Other] flash_write_tool

Description: 这是一个通过jatg线从PC机下载Fpga与cpu文件到设备的程序。下载的文件保存到串行128K的flash中。-This is a line through jatg downloaded from the PC and cpu Fpga documents to the equipment. Download the file to the serial flash 128 K were.
Platform: | Size: 3570688 | Author: 田华 | Hits:

[Software Engineering] FPGAEPP.files

Description: USB、串口、并口是PC机和外设进行通讯的常用接口，但对于数据量大的图像来说，若利用串行RS-232协议进行数据采集，速度不能达到图像数据采集所需的要求；而用USB进行数据采集，虽能满足所需速度，但要求外设必须支持USB协议，而USB协议与常用工程软件的接口还不普及，给使用带来困难。有些用户为了利用标准并行口(SPP)进行数据采集，但SPP协议的150kb/s传输率对于图像数据采集，同样显得太低。因此,为了采集数据量大的图像数据,本文采用了具有较高传输速率的增强型并行口协议(EPP)和FPGA，实现对OV7620CMOS图像传感器进行高速数据采集，它最高速率可以达到2Mb/s。-USB, serial port, parallel port is PC and peripherals used for the communication interface, But for the large volume of data images, if the use of Serial RS-232 data acquisition agreement, speed image data can not achieve the requirements for acquisition; using USB for data collection, can meet the required speed, But requirements must support USB peripherals agreement, and USB agreement with the commonly used engineering software interface is not universal, difficult to use. Some users to take advantage of standard parallel port (SPP), for data collection, But SPP agreement of 150 kb/s transfer rate for image data acquisition, the same is too low. Therefore, in order to collect large quantities of data image data, In this paper, the high transmission rate of enhanced parallel port proto
Platform: | Size: 81920 | Author: yaoming | Hits:

[VHDL-FPGA-Verilog] UART_ise7_bak

Description: 用FPGA 实现全双工异步串口（UART），与PC 机通信。1 位起始位；8 位数据位；一个停止位；无校验位；波特率为2400、4800、9600、11520 任选或可变（可用按键控制波特率模式）。-using FPGA full-duplex asynchronous serial port (UART), and PC communication. An initiation; 8 data spaces; One-stop; No Parity; Baud Rate for 2400,4800,9600, 11520 optional or variable (baud rate can be used to control keypad mode).
Platform: | Size: 32768 | Author: lee | Hits:

[Console] temp

Description: 上位PC机通过rs232口与fpga通信，发送数据，并可以接受数据-PC-PC through the RS232 port and FPGA communication, send data, and can accept data
Platform: | Size: 2058240 | Author: xianchunwwang | Hits:

[SCM] new-lins-uart-all

Description: 无私奉献，VHDL 源码，用于实现FPGA上的UART(串口控制器)，可以实现FPGA与单片机，PC机的串口通讯。-Selfless dedication, VHDL source code for the FPGA realization of the UART (serial port controller), you can realize FPGA and MCU, PC serial communication machine.
Platform: | Size: 6144 | Author: 骑士 | Hits:

[Other Embeded program] mydesign

Description: 自己做的毕业设计，任意波形发生器的原理图及pcb版图，基于mcu和FPGA实现的-Graduates to do their own design, arbitrary waveform generator of the schematic diagram and pcb layout, FPGA-based mcu and realize the
Platform: | Size: 764928 | Author: | Hits:

[Com Port] FPGA

Description: 本文介绍了一种新的使用串行通信进行DSP远程在线编程方法。对设计中的主要技术：DSP与PC机的串口通信、Flash编程以及DSP自引导等进行了详细介绍。结合TI公司的TMS320VC33处理器，阐述了具体的实现方法-This paper introduces a new use of serial communications DSP remote online programming method. On the design of the main techniques: DSP and PC-serial communication, Flash programming as well as the DSP, such as self-guided introduction in detail. Combination of TI
Platform: | Size: 54272 | Author: roger | Hits:

[Com Port] feng_rs0

Description: 基于FPGA的串口通信，PC给FPGA发送数据，FPGA收到数据并返回给PC-FPGA-based serial communications, PC to the FPGA to send data, FPGA Receive data and return to the PC
Platform: | Size: 305152 | Author: 王OO | Hits:

[VHDL-FPGA-Verilog] calculator_vhdl

Description: Design PC calculator controlled by PC, using FPGA .PC and FPGA are connected by USB. -Design PC calculator controlled by PC, using FPGA .PC and FPGA are connected by USB.
Platform: | Size: 3501056 | Author: song | Hits:

[VHDL-FPGA-Verilog] pc

Description: 键盘和USB与PC机的接口程序，适用于CPLD FPGA设计中，与上位机的连接与通信-Keyboard and USB and PC-interface program for the design of CPLD FPGA with PC connectivity and communication
Platform: | Size: 165888 | Author: mengzi | Hits:

[Process-Thread] UART

Description: minimum uart Image for transfer image to FPGA then read again by PC
Platform: | Size: 409600 | Author: umar | Hits:

[Embeded-SCM Develop] FPGA-PCI

Description: 基于FPGA的PCI接口源代码及Testbench Verilog程序代码-fpag pci
Platform: | Size: 467968 | Author: lang | Hits:

[Software Engineering] FPGA

Description: 基于FPGA芯片控制全彩LED大屏幕图像显示系统系统设计随着数字技术的飞速发展，各种数字显示屏也随即涌现出来有LED、LCD、DLP等，各种数字大屏幕的控制系统多种多样，有用ARM+FPGA脱机控制系统，也有用PC+DVI接口解码芯片+FPGA芯片联机控制系统，在这里我们讲述一种不仅可以用于控制全彩LED大屏幕的显示，而且还可以作为发送端输出高清图像数据。采用的联机控制系统对全彩LED大屏幕进行控制。即PC+DVI接口解码芯片+FPGA芯片+输出接口模式的联机控制系统-FPGA-based full-color LED chips to control large-screen image display system, system design with the rapid development of digital technology, digital displays have also emerged immediately LED, LCD, DLP, etc., all kinds of large-screen digital control system diverse and useful ARM+ FPGA offline control system, it also uses PC+ DVI interface decoder chip+ FPGA chip-line control system, we have described here can not only be used to control a full-color large screen LED display, but also can serve as a send ended output high-definition image data. Online control system used on large-screen full-color LED control. PC+ DVI interface that decoder chip+ FPGA chip+ output interface of the online control system model
Platform: | Size: 833536 | Author: 打狗队 | Hits:

[VHDL-FPGA-Verilog] FPGA-URAT

Description: FPGA与PC串口自动收发程序,verilog源程序-FPGA and the PC serial port automatically sending and receiving process, verilog source code
Platform: | Size: 3072 | Author: niuqs | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart-universal aynchronious reciever and transmitter used to connect the pc and fpga to pass the data
Platform: | Size: 3072 | Author: priya | Hits:

[Com Port] RS232

Description: interfacing pc with FPGA for data communication-interfacing pc with FPGA for data communication
Platform: | Size: 49152 | Author: berhe | Hits:

[Com Port] FPGA-RS232-verilog

Description: fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug debugging assistant
Platform: | Size: 500736 | Author: yvaine | Hits:

[VHDL-FPGA-Verilog] FPGA-SPI-Slave

Description: SPI通信基于NI FPGA，利用FPGA硬件对SPI通信进行解析。-SPI communication based on NI FPGA。Build the communication between PC and SPI device
Platform: | Size: 97280 | Author: leevy | Hits:
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