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[SCM] oc8051

Description: 51的VERILOG代码！适用于Xilinx的FPGA-51 VERILOG code! In Xilinx FPGA
Platform: | Size: 1220608 | Author: 林建加 | Hits:

[VHDL-FPGA-Verilog] uart_verilog

Description: 包含UART口的VERILOG源程序，该程序在FPGA上验证通过，可作为芯片设计，或FPGA设计的一个完整IP核，硬件设计的兄弟们可参考一下。-include UART port of VERILOG source, the program tested in FPGA, as chip design, or FPGA design of a complete IP cores, hardware design brothers can make reference.
Platform: | Size: 9216 | Author: 施向东 | Hits:

[VHDL-FPGA-Verilog] xsoc-beta-093

Description: This free cpu-ip! use verilog
Platform: | Size: 3341312 | Author: 王军 | Hits:

[Other] jtag_verilog

Description: verilog 实现的jtag ip模块 包括了测试程序-Verilog achieve the JTAG ip modules including test procedures
Platform: | Size: 6144 | Author: 陈俊 | Hits:

[Software Engineering] m16550a_verilog_rtl

Description: mentor UART IP verilog源码 以通过验证.-mentor UART IP verilog source to the test.
Platform: | Size: 25600 | Author: cray | Hits:

[VHDL-FPGA-Verilog] 2C35F672_FFT

Description: 在Altera芯片2C35F672平台上的FFT程序，采用DSPBuilder5.0，生成Verilog文件。开发环境：QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
Platform: | Size: 474112 | Author: lovenevol | Hits:

[Other Embeded program] ip

Description: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Platform: | Size: 5391360 | Author: 钟阳 | Hits:

[SCM] 32-bit_RISC_IP_Core

Description: 32位RISC单片机verilog源码内包含说明文档经过他人测试通过-32-bit RISC single-chip Verilog source code contains documentation of others after the test
Platform: | Size: 33792 | Author: 栾日超 | Hits:

[VHDL-FPGA-Verilog] Ethernet_verilog_ip_core

Description: Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核，对学习verilog语言和以太网有很大帮助。-Ethernet (Ethernet) verilog ip core language used verilogHDL Ethernet soft-core, learning Verilog language and Ethernet are very helpful.
Platform: | Size: 903168 | Author: houlongting | Hits:

[VHDL-FPGA-Verilog] i2c_p_altera

Description: altera i2c slave ip核verilog 编写-altera i2c slave ip to prepare nuclear Verilog
Platform: | Size: 1583104 | Author: 1984taozi | Hits:

[Embeded-SCM Develop] niosii_vga_ref_des

Description: VGA核的verilog实现，能用于NIOS2的avalon总线-VGA core Verilog realize, can be used to NIOS2 the avalon bus
Platform: | Size: 617472 | Author: 李永杰 | Hits:

[Other] EHERNETIPcore

Description: 该文件包含以太网IP核的相关代码，一共包含24个VERILOG源代码-This document contains the relevant Ethernet IP core code, a total of 24 includes Verilog source code
Platform: | Size: 69632 | Author: season | Hits:

[Other Embeded program] cyc2_cmon_080805

Description: Verilog 8051 IP Core for Cyclone -Verilog 8051 IP Core for Cyclone II
Platform: | Size: 63488 | Author: Alx | Hits:

[SCM] DW8051(Verilog)

Description: 51单片机IP核源码，可以在fpga实现，并进行仿真与验证-51 single-chip IP nuclear source, you can achieve the fpga, and simulation and verification
Platform: | Size: 67584 | Author: xuhuifeng | Hits:

[VHDL-FPGA-Verilog] VERILOG-USB2.0IP-core

Description: 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
Platform: | Size: 220160 | Author: king | Hits:

[VHDL-FPGA-Verilog] NAND_IP

Description: Nand flash VHDL code and Nand flash verilog code
Platform: | Size: 22528 | Author: psungil | Hits:

[VHDL-FPGA-Verilog] sdram_vhd_134

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is Verilog. This code is based Xilinx FPGA Playform.
Platform: | Size: 488448 | Author: peace | Hits:

[VHDL-FPGA-Verilog] 8051_verilog

Description: 8051 IP, 使用veriog实现，在Altera9.0环境下编译通过-8051 IP in verilog, which is verified in Altera9.0 environmen.
Platform: | Size: 51200 | Author: dylan huang | Hits:

[VHDL-FPGA-Verilog] USB2.0IP(RTL)

Description: USB2.0 IP核,ASIC,FPGA可用,Verilog HDL源代码-USB2.0 IP,Verilog HDL
Platform: | Size: 64512 | Author: AmazingEric | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: FPGA应用开发入门与典型实例 代码 FPGA（现场可编程逻辑器件）以其体积小、功耗低、稳定性高等优点被广泛应用于各类电子产品的设计中。本书全面讲解了FPGA系统设计的背景知识、硬件电路设计，硬件描述语言Verilog HDL的基本语法和常用语句，FPGA的开发工具软件的使用，基于FPGA的软核嵌入式系统，FPGA设计的基本原则、技巧、IP核， FPGA在接口设计领域的典型应用，FPGA＋DSP的系统设计与调试，以及数字变焦系统和PCI数据采集系统这两个完整的系统设计案例。 -FPGA Application Development and Typical examples of code for FPGA (field programmable logic device) for its small size, low power consumption, high stability, the advantages are widely used in the design of electronic products. This book comprehensively explained the background FPGA system design, hardware design, hardware description language Verilog HDL syntax and basic common statement, FPGA use of the software development tools, FPGA-based soft-core embedded systems, FPGA design of the basic principles , skills, IP core, FPGA interface design field in a typical application, FPGA+ DSP system design and debug, and digital zoom systems and PCI data acquisition system design of two cases of complete system.
Platform: | Size: 10980352 | Author: 海到无涯 | Hits:
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