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[Software Engineeringeee

Description: 并行AVS实时编解码器设计与实现 介绍了一种并行AVS实时编码器的设计,它包括音视频数据输入、音视频编码、传输流系统复用器、输出和控制部分,其 中重点介绍了视频编码器和传输流系统复用器的设计和实现。实验结果证明,实现标清AVS实时编码器是可行的。-Parallel real-time codec AVS Design and Implementation of AVS introduce a parallel real-time encoder design, which includes audio and video data entry, audio and video encoding, transport stream multiplexer system, the output and control parts, which focuses on video encoding and Transport Stream Multiplexer System Design and Implementation. Experimental results show that AVS realize SDTV real-time encoder is feasible.
Platform: | Size: 308224 | Author: sss | Hits:

[Windows Develop````

Description: Multiplexer 16-to-4 using Selected Signal Assignment Statement
Platform: | Size: 2048 | Author: | Hits:

[Software EngineeringSOPC_MPEG2_trainsformer

Description: 论文题目:基于SOPC的MPEG2传输流复用器设计-Thesis topic: Based on SOPC the MPEG2 transport stream multiplexer design
Platform: | Size: 28672 | Author: 张贺 | Hits:

[Graph programmp4creator-win32-1.6.1e-pre

Description: A MPEG4 Multiplexer/Demultiplexer to create IETF standards-conform streams with additional Quicktime support for chapters and anamorphic resizing
Platform: | Size: 238592 | Author: yanyuan | Hits:

[Other Embeded program4to1MUX

Description: Verilog code for 4 t0 1 multiplexer
Platform: | Size: 2048 | Author: wajahat | Hits:

[VHDL-FPGA-VerilogMultiplexer

Description: 这是一个用vhdl硬件描述语言实现的乘法器而不是多路选择器-this is an implimentation of an multiplier rather than multiplexer.
Platform: | Size: 145408 | Author: maxpayne | Hits:

[VHDL-FPGA-Verilog16-1MUX

Description: 16 down to 1 Multiplexer in Vhdl
Platform: | Size: 65536 | Author: Abdullah | Hits:

[Windows Developmultiplexer

Description: implementation of multiplexer circuit-implementation of multiplexer circuit..
Platform: | Size: 157696 | Author: zeeshan | Hits:

[VHDL-FPGA-Verilogmultiplexer

Description: multiplexer xilinx FPGA
Platform: | Size: 310272 | Author: kkkkkk | Hits:

[VHDL-FPGA-Verilogmultiplexer

Description: A program for a simple multiplexer using modelsimSE6.3
Platform: | Size: 8192 | Author: Subhaiit | Hits:

[VHDL-FPGA-Verilogmultiplexer

Description: 几种常用乘法器的Verilog、VHDL代码-Several common multiplier Verilog, VHDL code
Platform: | Size: 267264 | Author: kk | Hits:

[VHDL-FPGA-Verilogmultiplexersemultiplexer

Description: this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural -this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural
Platform: | Size: 91136 | Author: jatab | Hits:

[Othermultiplexer

Description: this is a multiplexer
Platform: | Size: 4096 | Author: eminem | Hits:

[Windows DevelopMultiplexer

Description: 這是一個4位元的多工器,是由一個2位元的多工器所構成-This is a 4-bit multiplexer is determined by a 2-bit multiplexer posed by
Platform: | Size: 82944 | Author: tw | Hits:

[Software EngineeringAD7992

Description: The AD7992 is a 12-bit, low power, successive approximation ADC with an I2C-compatible interface. The part operates from a single 2.7 V to 5.5 V power supply and features a 2 μs conver-sion time. The part contains a 2-channel multiplexer and track-and-hold amplifier
Platform: | Size: 736256 | Author: d | Hits:

[Com Portmultiplexer

Description: 一个关于gsm协议的 multiplexer protocol 的研究笔记 希望大家可以从中受益-An agreement on the multiplexer protocol gsm research notes hope that we can benefit from
Platform: | Size: 214016 | Author: lidengtao | Hits:

[VHDL-FPGA-VerilogMultiplexer

Description: Source code of multiplexer on VHDL. The compilation is done in Quartus II for Cyclone II.
Platform: | Size: 458752 | Author: Dave | Hits:

[VHDL-FPGA-Verilog5-multiplexer

Description: five multiplexer, verilog, altera de2 board~
Platform: | Size: 2048 | Author: KYchocz | Hits:

[VHDL-FPGA-VerilogMultiplexer-Description

Description: 通过应用QUARTUSII开发软件对二选一多路选择器进行设计并运行结果-Software development through the application of QUARTUSII choose one of two multiplexer design and operation results
Platform: | Size: 10240 | Author: renee | Hits:

[VHDL-FPGA-VerilogMultiplexer-Description2

Description: 通过应用QUARTUSII开发软件对 四选一多路选择器进行设计,并给出运行结果-Software development through the application of QUARTUSII choose one of four multiplexer design, and operating results are given
Platform: | Size: 14336 | Author: renee | Hits:
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