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[Com Port] usb_ctr

Description: usb的verilog 代码。对理解usb的原理有很大帮助，并可以在nc环境下仿真。-usb the Verilog code. Usb to understand the principle is very helpful, and to be nc simulation environment.
Platform: | Size: 53411 | Author: hongbo | Hits:

[Linux-Unix] ICcard

Description: IC电话卡计费系统，基于UNIX系统的NC—Verilog的硬件开发。
Platform: | Size: 1306520 | Author: 王沙一 | Hits:

[Other resource] Verilog_tutorial_NC

Description: 对NC Verilog的基本介绍，详细的图解，非常适合初学者使用，一个word文档和一个pdf文档
Platform: | Size: 802801 | Author: ly | Hits:

[Program doc] veilog HDL编码规范

Description: 详细介绍了verilog HDL编码的注意事项和基本规范。分为可综合部分，仿真专用部分以及nc-verilog仿真环境的建立。
Platform: | Size: 745126 | Author: venturezhao@gmail.com | Hits:

[Com Port] usb_ctr

Description: usb的verilog 代码。对理解usb的原理有很大帮助，并可以在nc环境下仿真。-usb the Verilog code. Usb to understand the principle is very helpful, and to be nc simulation environment.
Platform: | Size: 53248 | Author: hongbo | Hits:

[Other] NC_Verilog

Description: nc 仿真的相关的初级介绍-nc simulation related to the initial introduction
Platform: | Size: 372736 | Author: | Hits:

[Linux-Unix] ICcard

Description: IC电话卡计费系统，基于UNIX系统的NC—Verilog的硬件开发。-IC phone card billing system, based on the UNIX system NC-Verilog hardware development.
Platform: | Size: 1306624 | Author: 王沙一 | Hits:

[VHDL-FPGA-Verilog] Verilog_tutorial_NC

Description: 对NC Verilog的基本介绍，详细的图解，非常适合初学者使用，一个word文档和一个pdf文档-NC Verilog on the basic introduction, detailed diagrams, very suitable for beginners to use, a word document and a pdf document
Platform: | Size: 802816 | Author: ly | Hits:

[VHDL-FPGA-Verilog] NcVerilog_tutorial

Description: nc verilog 的使用说明和实例，对于实用nc来进行仿真进行了详细说明。-nc verilog instructions and examples for the utility to carry out simulation nc described in detail.
Platform: | Size: 591872 | Author: 李林 | Hits:

[VHDL-FPGA-Verilog] EfficientSynthesizableFiniteStateMachineDesignusin

Description: 高效的同步有限状态机的设计，本代码详细的说明了如何设计高效和规范的fsm设计-Efficient Synthesizable Finite State Machine Design using NC-Verilog
Platform: | Size: 100352 | Author: terry | Hits:

[VHDL-FPGA-Verilog] ncvlog

Description: Cadence NC-verilog user guide C adence NC-verilog user guide C adence NC-verilog user guide Cadence NC-verilog user guide-Cadence NC-verilog user guide Cadence NC-verilog user guide Cadence NC-verilog user guide Cadence NC-verilog user guide Cadence NC-verilog user guide Cadence NC-verilog user guide
Platform: | Size: 3240960 | Author: anwei2048 | Hits:

[VHDL-FPGA-Verilog] synth_fft

Description: fftprocessing can complete 256 pointsFFT.-Hardware Description Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools having good effect in the system design，Meanwhile，it adopted the core provided by Xilinx／nc. improving the design efficiency．The whole design which is implemented inXC2S600E device relied on ISE and advanced hierarchy design mind．Furthermore，it is simulated and verified．The frequency attains to 40.64MHz．this paper aims at demonstration the applying FPGA to FFT signal processing can complete 256 pointsFFT.
Platform: | Size: 56320 | Author: zzy | Hits:

[VHDL-FPGA-Verilog] pskdem_fixed

Description: psk解调的定点仿真模型。另外DEC2HEX.C负责将十进制的数据文件转换为十六进制的数据文件，因为MATLAB输出数据格式为十进制，而NC-VERILOG能够读取的数据格式为十六进制，所以需要转换。-psk demodulation of the fixed-point simulation models. In addition DEC2HEX.C responsible for the data file is converted to decimal hex data file, as MATLAB output data format is decimal, and NC-VERILOG can read the data in hexadecimal format, you need to convert.
Platform: | Size: 11264 | Author: 杨芳 | Hits:

[Software Engineering] ncvlog

Description: Cadence公司的NC-Verilog® Simulator Help文档，内容很全面共1446页。-The Cadence® NC-Verilog® simulator is a Verilog digital logic simulator that combines the high-performance of native compiled code simulation with the accuracy, fl exibility, and debugging capabilities of event-driven simulation.
Platform: | Size: 3313664 | Author: 高宇翔 | Hits:

[VHDL-FPGA-Verilog] Verilog_primer_V1.1

Description: Verilog HDL 语言的编码规范。详细介绍了verilog HDL编码的注意事项和基本规范。分为可综合部分，仿真专用部分以及nc-verilog仿真环境的建立。-Description of Verilog HDL coding. containing synthesisable language, simulationable language and how to construct a proper environment.
Platform: | Size: 745472 | Author: Venture Zhao | Hits:

[VHDL-FPGA-Verilog] ltc1068

Description: ltc1068简易数控滤波器（1k-20kHz）verilog-ltc1068 Simple NC filter (1k-20kHz) verilog
Platform: | Size: 1796096 | Author: 文杰 | Hits:

[VHDL-FPGA-Verilog] frequency-divider

Description: 用VERILOG 语言写的数控分频器，可能输入时钟信号实现任意整数倍的分频，-NC divider, with the words written in VERILOG HDL, can achieve any integer multiple of the input clock frequency, contains the entire project file.
Platform: | Size: 491520 | Author: zyb | Hits:

[e-language] Verilog-HDL

Description: 本课程设计在EDA开发平台上利用Verilog HDL语言设计数控分频器电路，利用数控分频的原理设计乐曲硬件演奏电路，并定制LPM-ROM存储音乐数据，-This course is designed to take advantage of the EDA Verilog HDL language development platform NC divider circuit design, the use of CNC dividing principles music playing hardware circuit design and customize LPM-ROM to store music data,
Platform: | Size: 1049600 | Author: 李永科 | Hits:

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