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[Other resourceMVHDL

Description: 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller will turn into VESA video signal and output to screen. The program has strong experience card
Platform: | Size: 4978192 | Author: 明華 | Hits:

[Technology Management2power2

Description: 在大功率DC/DC开关电源中,为了获得更大的功率,特别是为了得到大电流时,经常采用N个单元并联的方法。多个单元并联具有高可靠性,并能实现电路模块标准化等优点。然而在并联中遇到的主要问题就是电流不均,特别在加重负载时,会引起较为严重的后果。普通的均流方法是采取独立的PWM控制器的各个模块,通过电流采样反馈到PWM控制器的引脚FB或者引脚COMP,即反馈运放的输入或者输出脚来调节输出电压,从而达到均流的目的。显然,电流采样是一个关键问题:用电阻采样,损耗比较大,电流放大后畸变比较大;用电流传感器成本高;用电流互感器采样不是很方便,同时会使电流失真。本文提出了一种新型的、方便的、无损的电流采样方法,并在这种电流检测方法的基础上实现了并联系统的均流。 -in High Power DC / DC switching power supply, in order to gain more power, in particular in order to obtain the current, frequently using N units parallel method. Parallel number of modules with high reliability, and the circuit module can achieve the advantages of standardization. However, in parallel encountered in the current main problem is uneven, particularly in the heavier load, it will cause more serious consequences. The general flow is to have an independent PWM controller modules, Current sampling through feedback to the PWM controller pin FB pin or COMP. that feedback operational amplifier input or output pin to adjust the output voltage, thereby achieving both flow purposes. Clearly, the current sampling is a key question : sampling resistor, loss comparison, the amplifier dis
Platform: | Size: 13056 | Author: duanshaochun | Hits:

[WinSock-NDISPOC

Description: a parallel output controller(handshake protocol)
Platform: | Size: 3961 | Author: humengwei | Hits:

[VHDL-FPGA-VerilogMVHDL

Description: 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller will turn into VESA video signal and output to screen. The program has strong experience card
Platform: | Size: 4977664 | Author: 明華 | Hits:

[Internet-NetworkPOC

Description: a parallel output controller(handshake protocol)-a parallel output controller (handshake protocol)
Platform: | Size: 4096 | Author: humengwei | Hits:

[Software Engineeringjiaotongdeng

Description: 本系统采用MSC-51系列单片机ATSC51和可编程并行I/O接口芯片8255A为中心器件来设计交通灯控制器,实现了能根据实际车流量通过8051芯片的P1口设置红、绿灯燃亮时间的功能;红绿灯循环点亮,倒计时剩5秒时黄灯闪烁警示(交通灯信号通过PA口输出,显示时间直接通过8255的PC口输出至双位数码管);车辆闯红灯报警;绿灯时间可检测车流量并可通过双位数码管显示。本系统实用性强、操作简单、扩展功能强。 -The system uses the MSC-51 Series MCU ATSC51 and programmable parallel I/O interface chip 8255A-centric devices to design the traffic light controller, which can realize the basis of actual traffic flow through the P1 port 8051 chip set red, green fuel Liang time function traffic lights lit cycle, the countdown five seconds left when the yellow light flashing warning (traffic lights signal through the PA output, indicating the time directly through the PC port output 8255 to double-digit digital tube) vehicles闯红灯alarm green time can detect the flow through a double-digital tube display. The system practical, simple operation, the expansion of strong functions.
Platform: | Size: 131072 | Author: ljj | Hits:

[Driver Developpoc

Description: parallel output controller
Platform: | Size: 83968 | Author: taoshang | Hits:

[VHDL-FPGA-VerilogCPU

Description: 实现简单CPU功能的源码,可以实现加减乘除和移位功能,VHDL代码,程序运行在MAX PULS和Quartua上。-The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus Ⅱ EDA tool is recommended and provided for simulation.
Platform: | Size: 4490240 | Author: 灿烂六月 | Hits:

[assembly languagefsd

Description: 本系统采用MSC-51系列单片机ATSC51和可编程并行I/O接口芯片8255A为中心器件来设计交通灯控制器,实现了能根据实际车流量通过8051芯片的P1口设置红、绿灯燃亮时间的功能;红绿灯循环点亮,倒计时剩5秒时黄灯闪烁警示(交通灯信号通过PA口输出,显示时间直接通过8255的PC口输出至双位数码管);车辆闯红灯报警;绿灯时间可检测车流量并可通过双位数码管显示。本系统实用性强、操作简单、扩展功能强。 -The system uses MSC-51 Series Microcontroller ATSC51 and programmable parallel I/O interface chip 8255A-centric devices to design traffic signal controller based on the actual traffic flow can be achieved through the P1 port 8051 chip set of red, green, gave the time of function traffic light cycle of light, the countdown 5 seconds left when the yellow light flashing warning (traffic light signal through the PA port output, display time directly through the 8255 output of the PC port to double-digit nixie tube) of vehicles running red lights warning green time can detect vehicles flow can be through a double-digit LED display. The system practical, simple, extending strong function.
Platform: | Size: 86016 | Author: qwwqe | Hits:

[Otherpoc

Description: The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus II EDA tool is recommended and provided for simulation.-A parallel output controller
Platform: | Size: 356352 | Author: 冯裕深 | Hits:

[ARM-PowerPC-ColdFire-MIPSjiaotongdeng

Description: 并行接口8255,定时/计时器8253,中断控制器8259A与计算机相连,通过8253产生1Hz的方波,并编程得到计时器,然后利用8259的中断功能和8255的并口输出数据功能做了一实时操作系统,来模拟十字路口交通灯的模拟-8255 parallel interface, timer/timer 8253, 8259A interrupt controller connected to a computer, by 8253 produce 1Hz square wave, and programmed by the timer, and interrupt functions using 8259 and 8255 of the parallel output data capabilities to do a real-time operation system, to simulate the intersection traffic light simulation
Platform: | Size: 37888 | Author: 王琦 | Hits:

[VHDL-FPGA-VerilogPOC

Description: 用VHDL语言设计的poc (并行输出控制器) 用法:中断模式 和 查询模式-Using VHDL language design poc (parallel output controller) Usage: interrupt mode and query mode
Platform: | Size: 409600 | Author: 束佳云 | Hits:

[VHDL-FPGA-VerilogPOC-Project

Description: 系统总线与打印机之间的借口:并行输出控制器POC的设计。涉及POC与CPU,POC与printer之间的握手操作。-Between the system bus and an excuse for the printer: parallel output controller POC design. Involved in POC and CPU, POC and the printer handshake between the operations.
Platform: | Size: 641024 | Author: ilmf | Hits:

[VHDL-FPGA-VerilogPrinter

Description: The internal circuit of the simulated printer module, in a students course design - A parallel output controller (POC) .-The internal circuit of the simulated printer module, in a students course design - A parallel output controller (POC) .
Platform: | Size: 2048 | Author: szfzafa | Hits:

[VHDL-FPGA-Verilogparallel-output-controller-(POC)

Description: 并行输出控制器,实现CPU与打印机之间的通信,程序基于VHDL语言,内附完整实验报告与仿真图像-The purpose of this project is to design and simulate a parallel output controller (POC)which acts an interface between system bus and printer. The Altera’s Quartus II EDA tool is recommended and provided for simulation.
Platform: | Size: 74752 | Author: 陈鹏 | Hits:

[VHDL-FPGA-VerilogPOC1

Description: 基于VHDL的并口控制器,用于实现CPU与打印机之间的通信。-A parallel output controller
Platform: | Size: 400384 | Author: liyang | Hits:

[VHDL-FPGA-Verilogpoc

Description: The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Maxplus II EDA tool is recommended and provided for simulation.
Platform: | Size: 427008 | Author: 程梦飞 | Hits:

[VHDL-FPGA-VerilogPOC

Description: 用VHDL语言设计一个并行输出控制器POC,作为系统总线个打印机的借口-The purpose of this project is to design and simulate a parallel output controller(poc) which acts an interface between system bus and printer. The Altera’s Maxplus II EDA tool is recommended and provided for simulation.
Platform: | Size: 476160 | Author: 张帆帆 | Hits:

[VHDL-FPGA-Verilogpoc04008307

Description: 设计一个并行输出控制器,可以连接系统总线和打印机- The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and the printer.
Platform: | Size: 451584 | Author: anny | Hits:

[VHDL-FPGA-VerilogPOC

Description: POC is one of the most common I/O modules, namely the parallel output controller. It plays the role of an interface between the computer system bus and the peripheral (such as a printer or other output devices).-A parallel output controller
Platform: | Size: 49152 | Author: qinhai | Hits:
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