Welcome![Sign In][Sign Up]
Location:
Search - serial data to parallel data

Search list

[VHDL-FPGA-Verilogdata_transfer

Description: 同步串行数据发送电路SSDT的基本功能是将并行数据转换成串行数据并进行同步发送。系统写入和读出时序完全兼容Intel8086时序。 系统以同步信号开始连续发送四个字节,在发送中出现5个1时插入一个0,在四个数据发送结束而下一次同步没有开始之前,发送7FH,这时中间不需要插入零 -synchronous serial data transmission circuit SSDT the basic function is to convert parallel data into serial and the same this step. System write and read sequential fully compatible Intel8086 timing. Synchronized signal system to start sending four consecutive bytes, in this emerging 5 1:00 insert a 0, at the end of four data sent and the next synchronization not started before, sending seven FH, then the middle is not inserted
Platform: | Size: 557056 | Author: chengp | Hits:

[Other Embeded programI2C_extender

Description: verilog编写,将I2C串行数据转化为并行数据的功能模块,类似于PCF8574芯片的功能。以后不用买另外的芯片就可以直接将并行数据连到I2C总线上了-Verilog prepared to I2C serial data into parallel data of the function modules, similar to the function of PCF8574 chip. After the chips do not have to buy another can be connected directly to the parallel data to the I2C bus on the
Platform: | Size: 1024 | Author: 苗苗 | Hits:

[Com PortUARTchuli

Description: UART 处理的是并行数据转换为串行信号和串行信号转换为并行数据。现有的时钟不精确,这就需要用一个远高于波特率的本地时钟信号对输入信号不断采样,以不断让接收器与发送器保持同步。-UART to handle is the parallel data into a serial signal and serial signal is converted to parallel data. Existing imprecise clock, which requires a much higher than the baud rate of the local clock signal for sampling the input signal continuously to continuously allow the receiver to maintain synchronization with the transmitter.
Platform: | Size: 1024 | Author: xuye | Hits:

[Windows Developparell_to_serial

Description: 该模块主要完成并串转换功能。其中system_clk是输入并行时钟的频率,它是串行时钟serial_clk的八倍。byte_data_en是输入并行数据使能信号,byte_data是输入并行数据。serial_data是转换后的串行数据,bit_data_enable是串行数据有效信号。-The module main is completed and the string conversion functions. System_clk which is an input parallel clock frequency, it is the serial clock serial_clk eight times. byte_data_en is a parallel data input enable signal, byte_data is a parallel data input. serial_data is converted serial data, bit_data_enable is the serial data signal.
Platform: | Size: 1024 | Author: huangdecheng | Hits:

[SCMserial2parallel

Description: this program based on MCS51 and converts a serial data to parallel on its port
Platform: | Size: 2048 | Author: amin shalchian | Hits:

[VHDL-FPGA-Verilogparallel_to_serial

Description: 一个并行转串行的verilog源程序,可以讲12位并行数据转换为一个串行数据-A parallel to serial verilog source code you can transfer your parallel data to serial data.you have 12bits parallel data then you will have a serial data
Platform: | Size: 153600 | Author: 梅博 | Hits:

[Com Portchuankoutongxin

Description: 串口通信的概念非常简单,串口按位(bit)发送和接收字节。尽管比按字节(byte)的并行通信慢,但是串口可以在使用一根线发送数据的同时用另一根线接收数据。它很简单并且能够实现远距离通信。比如IEEE488定义并行通行状态时,规定设备线总常不得超过20米,并且任意两个设备间的长度不得超过2米;而对于串口而言,长度可达1200米。典型地,串口用于ASCII码字符的传输。通信使用3根线完成:(1)地线,(2)发送,(3)接收。由于串口通信是异步的,端口能够在一根线上发送数据同时在另一根线上接收数据。其他线用于握手,但是不是必须的。串口通信最重要的参数是波特率、数据位、停止位和奇偶校验。-The concept of serial communication is very simple, serial by bit (bit) to send and receive bytes. Although more than by byte (byte) of parallel communication slow, but can use a serial line to send data at the same time another line to receive data. It is very simple and can achieve long-distance communications. For example, the definition of IEEE488 parallel access mode, the total line often provides equipment shall not be more than 20 meters, and between any two devices may not be more than two meters in length and in terms of the serial port, up to 1200 meters in length. Typically, serial code for the ASCII character transmission. 3 lines of communication to use to complete: (1) ground, (2) send, (3) to receive. Due to the asynchronous serial communication port to send data in a line at the same time another line to receive data. Other lines for the handshake, but not necessary. Serial communication the most important parameter is the baud rate, data bits, stop bits and parity.
Platform: | Size: 1024 | Author: zhendongzhao | Hits:

[Special EffectsImage

Description: 遥感图像的打开处理程序,能够打开单波段,多波段图像,几何图像变换,线性拉伸变换,平滑 处理包括并行和串行,锐化处理包括梯度锐化、Roberts锐化、laplace锐化、sobel锐化等,还 有用绝对距离和马氏距离算法进行的监督分类算法等,包括了RAW格式数据资源-The opening of remote sensing image processing, to open the single-band, multi-band images, geometric image transformations, linear stretching transformation, smoothing, including parallel and serial processing, including gradient sharpening sharpening, Roberts sharpening, laplace sharpening, sobel sharpening, as well as with the absolute distance and Mahalanobis distance algorithm of the supervised classification algorithms, including the RAW format of data resources
Platform: | Size: 10661888 | Author: 幻影 | Hits:

[ARM-PowerPC-ColdFire-MIPS1bitled

Description: SSI对从外设器件接收到的数据执行串行到并行转换。CPU可以访问SSI数据寄存器来发送和获得数据。发送和接收路径利用内部FIFO存储单元进行缓冲,以允许最多8个16位的值在发送和接收模式中独立地存储。 使用 ssi 控制1位数码管的显示-SSI received from peripheral devices to the implementation of the serial to parallel data conversion. CPU can access data register SSI to send and receive data. Send and receive path to use the internal FIFO buffer memory unit to allow a maximum of eight 16-bit value in the send and receive mode, an independent store.
Platform: | Size: 31744 | Author: songfei | Hits:

[Otherpar2ser

Description: 并/串转换器即并行输入、串行输出转换器,例如一个8bit输入的并/串转换器,输出时钟频率是输入时钟频率的8倍,输入端一个时钟到来,8个输入端口同时输入数据;输出端以8倍的速度将并行输入的8bit串行输出,至于从高位输出还是从低位输出,可以再程序中指定。-And/or parallel series converter input, serial output converter, for example, a 8bit input and/series converter, the output clock frequency is the input clock frequency of 8 times, the arrival of a clock input, 8 input data input port at the same time output to 8 times the speed of 8bit parallel input serial output, as output from a high level or low output, the procedure can be specified.
Platform: | Size: 1024 | Author: 赵军 | Hits:

[VHDL-FPGA-Verilogcollude

Description: 这是串转并的程序,能够张串行的数据,变成并行的数据-This is the string and the procedure to be able to Zhang serial data into parallel data
Platform: | Size: 137216 | Author: 梁永安 | Hits:

[OtherSim_SDAIN

Description: 并行数据转换串行数据发生VHDL程序,需要的同志可以看看是否可以用 自己写的-Serial data in parallel data conversion process occurred in VHDL, the comrades need to see if it can be written in their own
Platform: | Size: 3072 | Author: 徐志平 | Hits:

[ADO-ODBCSim_SDAOUT

Description: 串行数据转换并行数据接收,同志们看看 我觉得不错 自己写的 都用上了-Serial data receiving parallel data conversion and comrades feel good to see I wrote it myself have used
Platform: | Size: 3072 | Author: 徐志平 | Hits:

[VHDL-FPGA-Verilogcode

Description: This project is "digital serial multiplier". this proh=ject is used to multiply the serial data with parallel data. the source code is writtenby using vhdl.
Platform: | Size: 5120 | Author: RUPA KRISHNA | Hits:

[VHDL-FPGA-VerilogUART_Receiver

Description: 将串行数据转换为16为并行数据。可以更改文件中的参数,适应其他位宽和数据长度的接收。-16 the serial data into parallel data. You can change the file parameters and data to adapt the length of the other bits wide receiver.
Platform: | Size: 1024 | Author: 陈建 | Hits:

[Others-to-p

Description: 交换芯片的LED灯的串行数据转并行输出子函数。-The LED lamp serial data to parallel output subfunction. The LED lamp serial data to parallel output subfunction.
Platform: | Size: 1024 | Author: xlw | Hits:

[VHDL-FPGA-Verilogverilog-procedures

Description: fpga的基于verilog的串行数据转并行数据的相关资料,相关内容uart协议,串并转换程序-verilog fpga-based serial data to parallel data, relevant information, relevant content uart protocol string and conversion program
Platform: | Size: 1412096 | Author: | Hits:

[Software Engineeringchuanxing-zhuan-bingxing

Description: 单片机串行数据转为并行数据,很好的程序,单片机100例里面的例子-MCU serial data to parallel data, a very good program, microcontroller 100 cases inside the case
Platform: | Size: 33792 | Author: wangxin | Hits:

[matlabSerial-Parallel-(2)

Description: It contains two function - 1.ser2par : Converts Serial Data to Parallel Data 2.par2ser : Converts Parllel data to Serial Data-It contains two function- 1.ser2par : Converts Serial Data to Parallel Data 2.par2ser : Converts Parllel data to Serial Data
Platform: | Size: 237568 | Author: 田田 | Hits:

[Windows Developvhdl_sp_ps

Description: 用VHDL实现的串行数据与并行数据相互转换的程序代码-Using VHDL to achieve the serial data and parallel data conversion program code
Platform: | Size: 65536 | Author: 肖伯特 | Hits:
« 12 3 4 5 6 7 8 9 10 »

CodeBus www.codebus.net