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[Embeded-SCM Develop] VSCPU

Description: 熟悉非常简单CPU模拟器 1、将所给模拟器的源程序编译成执行程序。 2、运行并观察非常简单CPU模拟器- The familiar extremely simple CPU simulator 1, will give the simulator the source program to translate the executive routine. 2nd, movement and observation extremely simple CPU simulator
Platform: | Size: 1726464 | Author: 晨曦 | Hits:

[Other] 最简单获取主板,cpu型号的方法

Description: 最简单获取主板,cpu型号的方法-access to the most simple motherboard, cpu type of method
Platform: | Size: 1024 | Author: 张然 | Hits:

[Other] 测cpu频率

Description: 本人写的小程序可以测试您的cpu正在运行的频率！简单实用！直接下载在vc上运行！-I write small programs can test your cpu running frequency! Simple and practical! Download the vc run!
Platform: | Size: 5120 | Author: | Hits:

[VHDL-FPGA-Verilog] MYCPU2.0

Description: 用verilog编写在FLEX10K上实现的简易CPU-used in the preparation of Verilog FLEX10K achieve simple CPU
Platform: | Size: 25600 | Author: 张桓铭 | Hits:

[uCOS] 8bit-cpu

Description: 一个简单的8位cpu的功能实现,从外部导入机器码,模拟cpu的运行-a simple 8 cpu to achieve the functions, from the outside into binary, simulating the operation of cpu
Platform: | Size: 49152 | Author: 陆阳 | Hits:

[Other] cpu的VERILOG描述

Description: RISC CPU的VerilogHDL描述-RISC CPU Verilog HDL description
Platform: | Size: 369664 | Author: 陈俊 | Hits:

[SCM] simple_design_cpu

Description: 有是一个简单的cpu设计的开发过程！里面 有代码，和分析，设计过程！献给初学者的！-there is a simple design of the cpu development process! There are codes, and analysis, process design! Dedicated to beginners!
Platform: | Size: 79872 | Author: 冯海 | Hits:

[VHDL-FPGA-Verilog] 数字系统设计相关

Description: 这是有关VHDL的相关源代码，有简易CPU、加法器、除法器、计数器等-This is the relevance of the VHDL source code, a simple CPU, Adder, Divider, counters, etc.
Platform: | Size: 45056 | Author: 刘建 | Hits:

[Algorithm] riscdesign

Description: 一个非常简单的cpu设计的原代码,是用verilog编写的-a very simple cpu design of the original code, was prepared by the Verilog
Platform: | Size: 730112 | Author: wanglei | Hits:

[Post-TeleCom sofeware systems] Behaviouralmodelofasimple8-bitCPU

Description: 个人认为几个比较实用的VHDL源码之二——Behavioural model of a simple 8-bit CPU-think of a few more practical VHDL source bis-- Behavioral mode l of a simple 8-bit CPU
Platform: | Size: 1024 | Author: xingqiba | Hits:

[VHDL-FPGA-Verilog] 8-CPU

Description: 简单的8位CPU，内含PDF文件.可自己查看详细说明-simple eight CPU, containing PDF files. They can check details
Platform: | Size: 2232320 | Author: shingo | Hits:

[Linux-Unix] cpu

Description: cpu.c -- simple CPU usage reporting tool-cpu.c-- simple CPU usage reporting tool
Platform: | Size: 1024 | Author: Ji | Hits:

[SCM] CPU

Description: Simple 8 bit ALU which subs, adds, ands, ors, nots, ...
Platform: | Size: 3072 | Author: Emrah | Hits:

[VHDL-FPGA-Verilog] CPU

Description: verilog实现的一个简单的CPU，大家可下载去瞅瞅啊-verilog to achieve a simple CPU, you can download to Chou Chou ah
Platform: | Size: 5705728 | Author: zhangrongfei | Hits:

[Other] cpu

Description: 简单CPU 能处理10条简单CPU指令 不包括IO指令-Simple CPU can process 10 a simple CPU instructions do not include IO commands
Platform: | Size: 1024 | Author: 谭国强 | Hits:

[VHDL-FPGA-Verilog] cpu

Description: verilog编写的简单的CPU，用于参考，已经过仿真-verilog prepared by a simple CPU, for reference, has been simulation
Platform: | Size: 4096 | Author: 于水洋 | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 设计以及基本的CPU，至少包括四个基本单元，控制单元，内部寄存器，ALU和指令集-The purpose of this project is to design a simple CPU (Central Processing Unit). This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program to verify its performance. For simplicity, we will only consider the relationship among the CPU, registers, memory and instruction set. That is to say we only need consider the following items: Read/Write Registers, Read/Write Memory and Execute the instructions. At least four parts constitute a simple CPU: the control unit, the internal registers, the ALU and instruction set, which are the main aspects of our project design and will be studied.
Platform: | Size: 2196480 | Author: mollyma | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 组成原理实验~简单cpu的设计~基于EDA环境下的-Composition Theory Experiment Design ~ ~ Simple cpu EDA environment based on
Platform: | Size: 724992 | Author: lynn | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 一个简单的CPU设计，支持add，sub，mvi，mv四条指令，用Verilog语言编写，在Quratus II上编译通过，仿真正确。-A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
Platform: | Size: 931840 | Author: 姜涛 | Hits:

[ELanguage] simple-cpu-emulator(C)

Description: 含user_prog文件的解释型7条指令的简单CPU模拟器-simple cpu emulator for 7 insts
Platform: | Size: 2048 | Author: zh | Hits:
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