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[VHDL-FPGA-Verilog] jiyuVHDLyuyandehanshuxinghaofashengqi

Description: 好用的函数信号发生器，能产生多种波形，例如，正弦波，方波，锯齿波，阶梯波。-Useful function signal generator, can produce a variety of waveforms, for example, sine wave, square wave, sawtooth, wave ladder.
Platform: | Size: 1024 | Author: sdfs | Hits:

[VHDL-FPGA-Verilog] signal_generator

Description: 基于vhdl的多功能函数信号发生器的设计，能实现三角波、方波、正弦波。-VHDL-based multi-function signal generator design, can achieve the triangular wave, square wave, sine wave.
Platform: | Size: 1024 | Author: tony | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: PWM控制就是产生一定周期，占空比不同的方波信号，当占空比较大时，电机转速较高，否则电机转速较低。当采用FPGA产生PWM波形时，只需FPGA内部资源就可以实现，数字比较器的一端接设定值输出，另一端接线性递增计数器输出。当线性计数器的计数值小于设定值时输出低电平，当计数器大于设定值时输出高电平，这样就可通过改变设定值，产生占空比不同的方波信号，从而达到控制直流电机转速的目的。 直流电机控制电路主要由2部分组成，如图1所示：  FPGA中PWM脉宽调制信号产生电路；  FPGA中正/反转方向控制电路 -PWM control is a certain cycle, a different duty cycle square wave signal, when the duty cycle is high, higher motor speed, or lower motor speed. When the PWM waveform generated using FPGA, the FPGA internal resources only can be achieved, the figure one comparator output termination setting, the other linear incremental counter output termination. When the value of linear counter output is less than low-level settings, when the counter output is greater than high settings, so that by changing the settings can produce different duty cycle square wave signal, DC motor control to achieve the purpose of speed. DC motor control circuit mainly by 2 parts, as shown in Figure 1:  FPGA in the PWM pulse width modulation signal generator circuit Chiang Kai-shek  FPGA/reverse direction control circuit
Platform: | Size: 37888 | Author: 袁玉佳 | Hits:

[Software Engineering] DDS

Description: 本设计基于数字频率合成技术,采用正弦查找表实现波形产生.直接数字频率合成技术（DDS）是一种先进的电路结构，能在全数字下对输出信号频率进行精确而快速的控制，DDS技术还在解决输出信号频率增量选择方面具有很好的应用，DDS所产生的信号具有频率分辨率高、频率切换速度快、频率切换时相位连续、输出相位噪声低和可以产生任意波形等诸多优点。 文中介绍了DDS的基本原理，对DDS的质谱及其散杂抑制进行了分析。程序设计采用超高速硬件描述语言VHDL描述DDS,在此基础上设计了正弦波、三角波、方波等信号发生器，。完成了软件和硬件的设计，以及实验样机的部分调试。 -The design is based on a digital frequency synthesis technology, to achieve wave synthesis by sine wave look-up tables. Direct Digital Synthesis Technology (DDS) is an advanced circuit structure, the output signal frequency is controlled precisely and rapidly in all-digital process, DDS technology has been applied in output signal frequency increment. DDS signals generated own high frequency resolution, frequency switching speed and continuous phase when frequency switching, low-output phase noise and can generate arbitrary waveform, and so on. Basic principles of the DDS is introduced in the paper, frequency form and stray inhabitation of the DDS is analyzed. Procedures designed with high-speed hardware description language VHDL describe DDS, and design a sine wave, triangle wave, square-wave signal generator by it.The hardware and software has been designed, prototype and circuit has been tested partly.
Platform: | Size: 312320 | Author: 蓝 | Hits:

[SCM] signal

Description: verilog写的串口控制信号发生器，能通过用串口控制产生正弦波方波等信号-written in verilog serial control signal generator, can be generated using serial control, such as sine wave square wave signals
Platform: | Size: 5519360 | Author: ray | Hits:

[VHDL-FPGA-Verilog] wave_generator

Description: 基于cycloneII的信号发生器，产生正弦波、方波、三角波，人机界面十分友好，可方便地进行波形切换-CycloneII based on the signal generator to produce sine wave, square wave, triangle wave, a very friendly man-machine interface can be easily switched waveform
Platform: | Size: 1429504 | Author: henry | Hits:

[VHDL-FPGA-Verilog] fourkindofwavesproductedbyVHDL

Description: 用VHDL语言编写的信号发生器。共有四种波形，递增锯齿波，方波，三角波，正弦波。因是初学者，故可能有些错误，望各位指正。-VHDL language with the signal generator. There are four types of waveforms, increased sawtooth, square wave, triangle wave, sine wave. I m beginner, so there may be some mistakes.
Platform: | Size: 185344 | Author: kinglg | Hits:

[VHDL-FPGA-Verilog] ddfs

Description: 基本FPGA的DDS信号发生器，可产生1-1MHZ任意频率的三角波，方波，锯齿波，正弦波-Basic FPGA-DDS signal generator, can produce 1-1MHZ arbitrary frequency triangle wave, square wave, sawtooth, sine wave
Platform: | Size: 1373184 | Author: 吴宏伟 | Hits:

[VHDL-FPGA-Verilog] FINALWORK

Description: 简易信号发生器 可产生正弦波、方波、三角波、锯齿波 周期可调 verilog-Simple signal generator can produce sine, square, triangle wave, sawtooth-cycle adjustable verilog
Platform: | Size: 1024 | Author: tank tan | Hits:

[Other] clock

Description: 基于VHDL的函数信号发生器，可输出方波，阶梯波，三角波，正铉波，用示波器观察-VHDL-based function of the signal generator can output a square wave, step-wave, triangle wave, positive-hyun waves observed with an oscilloscope
Platform: | Size: 3197952 | Author: niha | Hits:

[VHDL-FPGA-Verilog] SIGNAL_GEN

Description: 利用EDA的VHDL硬件描述语言设计的函数信号发生器，可以产生递增、递减斜波，三角波，阶梯波，正弦波，方波-The use of EDA, VHDL hardware description language design function of the signal generator can generate increased progressively decreasing ramp, triangle wave, step-wave, sine wave, square wave
Platform: | Size: 519168 | Author: 心心 | Hits:

[File Format] renyiboxing

Description: 信号发生器是一种常用的仪器，能够实现各种波形，不同频率的输出，电子测试系统的重要部件。本研究 的数字信号发生器足基于直接数字合成即DDS技术设计的，采用VHDL与C语言相结合的方法，通过查找存储 于ROM查找表中的各种标准波形数据，产牛频率Hf调并且高精度的正弦波、方波、锯齿波等常用信号，并且町 以通过修改表中的数据，实现任意信号发生器-Signal generator is a commonly used instrument to achieve a variety of waveforms of different frequency output, a key component of electronic test systems. In this study, full digital signal generator that is based on DDS technology of direct digital synthesis design, VHDL and C language using the method of combining, by looking up stored in ROM look-up table in a variety of standard waveform data, the cattle and the high frequency tone Hf accuracy of the sine wave, square wave, sawtooth and other signals used, and town to modify table data, an arbitrary signal generator
Platform: | Size: 268288 | Author: 姚木 | Hits:

[VHDL-FPGA-Verilog] wave_finish

Description: 基于quartus2的信号发生器，可产生正弦，三角，方波-Based quartus2 signal generator can produce sine, triangle, square wave. .
Platform: | Size: 1138688 | Author: aaaajjjj | Hits:

[VHDL-FPGA-Verilog] dds

Description: 基于vhdl的dds信号发生器，可产生方波，三角波，正弦波，幅度，频率，相位可调-The signal generator based on VHDL DDS, can produce square wave, triangle wave, sine wave, amplitude, frequency, phase can be adjusted
Platform: | Size: 1628160 | Author: | Hits:

[VHDL-FPGA-Verilog] Multi-function-waveform-generator

Description: 本系统应用VHDL语言及MAX+PLUS II仿真软件利用自顶向下的设计思想进行设计，结合示波器加以完成一个可应用于数字系统开发或实验时做输入脉冲信号或基准脉冲信号用的信号发生器，它具结构紧凑，性能稳定，设计结构灵活，方便进行多功能组合的特点，经济实用，成本低廉。具有产生四种基本波形脉冲信号（方波、三角波、锯齿波和正弦波），且脉冲信号输出幅度及输出频率可调，对于方波信号，还可以实现占空比可调。通过软件仿真和硬件测试都得到了预期的结果。-The system using VHDL language and MAX+ PLUS II simulation software using a top-down design ideas to design a combined oscilloscope be completed to do the input pulse signal or reference pulse signal with the signal generator used in digital system development or experimentalwith compact structure, stable performance, flexible structure design, convenient multifunction portfolio characteristics, economical and practical, low cost. Has four basic waveform pulse signal (square wave, triangle wave, sawtooth and sine wave), and the amplitude of the pulse signal output and the output frequency is adjustable, adjustable duty cycle square wave signal can also be achieved. Expected results through software simulation and hardware testing.
Platform: | Size: 1485824 | Author: xinxing | Hits:

[VHDL-FPGA-Verilog] xinhao

Description: 简易信号发生器，可输出三种波形，递增锯齿波发生器模块，正弦波发生器模块，方波发生器模块，波形选择器模块，vhdl-Simple signal generator can output three waveforms, incremental sawtooth generator module, the sine wave generator module, a square wave generator module, waveform selector module, vhdl
Platform: | Size: 60416 | Author: 沈微 | Hits:

[VHDL-FPGA-Verilog] hsk4571_sgna_generator

Description: 信号发生器的VHDL实现，可调节波形及频率，方波、锯齿波、三角波等，在QUATTUS||9.0下编写，可在9.0及以上版本运行并下载，芯片为Altera的Cyclone3 EP3C8T1-Signal Generator VHDL implementation, adjustable waveform and frequency, square wave, sawtooth, triangle, etc., in QUATTUS | | 9.0 under preparation, can be run in the 9.0 and above versions and download, chips for Altera s Cyclone3 EP3C8T144
Platform: | Size: 9726976 | Author: hongsk | Hits:

[Software Engineering] function-of-fangbozhenxianandsanjiao

Description: 基于FPGA的函数信号发生器VHDL设计，包括方波、三角波和正弦波-FPGA-based VHDL design function signal generator, including a square wave, triangle wave and sine
Platform: | Size: 119808 | Author: eeant | Hits:

[Other] DDS

Description: 本设计基于数字频率合成技术,采用正弦查找表实现波形产生.直接数字频率合成技术（DDS）是一种先进的电路结构，能在全数字下对输出信号频率进行精确而快速的控制，DDS技术还在解决输出信号频率增量选择方面具有很好的应用，DDS所产生的信号具有频率分辨率高、频率切换速度快、频率切换时相位连续、输出相位噪声低和可以产生任意波形等诸多优点。 文中介绍了DDS的基本原理，对DDS的质谱及其散杂抑制进行了分析。程序设计采用超高速硬件描述语言VHDL描述DDS,在此基础上设计了正弦波、三角波、方波等信号发生器，。完成了软件和硬件的设计，以及实验样机的部分调试。-The design is based digital frequency synthesizer technology, using a sine lookup table to achieve waveform generation. Direct digital frequency synthesis (DDS) is an advanced circuit structure can fully digital output signal frequency under precise and fast control, DDS technology also solve the incremental output signal frequency selection signal having a very good application, DDS generated by high frequency resolution, frequency switching speed, phase-continuous frequency switching time, low phase noise output and can generate arbitrary waveforms, and many other advantages . This paper introduces the basic principles of the DDS, DDS MS for its bulk inhibition were analyzed. Programming using ultra high-speed hardware description language VHDL description DDS, on the basis of the design of the sine wave, triangle wave, square wave signal generator. Completed part of debugging software and hardware design, and the experimental prototype.
Platform: | Size: 4485120 | Author: 冯阳 | Hits:

[VHDL-FPGA-Verilog] Signal-Generator-VHDL-design

Description: 信号发生器VHDL设计 波形可选：正弦(sine)，方波(sqr)，锯齿波(jc_de和jc_in两种)，三角波(sanj)和阶梯波(stair)信号模块-Optional waveform signal generator VHDL design: sinusoidal (sine), square wave (sqr), sawtooth (jc_de and jc_in two kinds), triangle wave (sanj) and staircase (stair) signal modules
Platform: | Size: 758784 | Author: | Hits:
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