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[Other] S3C44B0X中文技术文档

Description:

 

介    绍
三星的S3C44B0X 16/32位RISC处理器被设计来为手持设备等提供一个低成本高性能的方案。
S3C44B0X提供以下配置：2.5V ARM7TDMI 内核带有8Kcache ;可选的internal SRAM;LCD Controller(最大支持256色STN，使用LCD专用DMA)；2-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SIO； 2-ch general DMAs / 2-ch peripheral DMAs with external request pins； External memory controller (chip select logic, FP/ EDO/SDRAM controller)； 5-ch PWM timers & 1-ch internal timer；Watch Dog Timer；71 general purpose I/O ports / 8-ch external interrupt source； RTC with calendar function； 8-ch 10-bit ADC； 1-ch multi-master IIC-BUS controller； 1-ch IIS-BUS controller； Sync. SIO interface and On-chip clock generator with PLL.。
S3C44B0X采用一种新的三星ARM CPU嵌入总线结构-SAMBA2，最大达66MHZ。

Platform: | Size: 78690 | Author: ssunshine | Hits:

[Embeded-SCM Develop] UART 串口编程

Description:

//串口编程--接收PC发过来的字符串,回发字符串.发送期间中断控制LED灯闪烁
//采用外部晶振22.1184MHz 使用定时器1,方式2产生波特率,SMOD = 0或者1
//定时器初值X=256-SYSCLK*(SMOD+1)/(BAUDRATE*384)
 


Platform: | Size: 4438 | Author: mcumcu | Hits:

[SCM] 软件UART示例

Description: 利用c8051f020单片机进行串口通讯的软件程序，此型单片机将会成为8位机主流-by Using C8051f020 MCU for serial communication software program, this type of SCM will become mainstream eight-
Platform: | Size: 152576 | Author: | Hits:

[Windows Develop] usbtest

Description: /*串行口操作模式1：8位UART，波特率可变,11.0592晶振*/ TMOD = 0x20 /*定时器*计数器1的操作模式为2*/ PCON = 0x80|PCON /*SMOD 置1*/ TH1 = 0xfd /*定时器1的重装载值，此时若SMOD=0，9.6K SMOD=1，19.2K*/ TR1 = 1 /*定时器*计数器1开始工作*/ REN = 1 /*允许串行口接收*/-/* serial port mode 1:8 bit UART, variable baud rate, crystal* 11.0592/TMOD = 0x20/** timer counter a mode of operation for 2*/P CON = 0x80 | PCON/* 1* SMOD home/0xfd TH1 =/* Incorporation of a timer contains the value at this time if SMOD = 0,9.6 SMOD K = 1, 19.2K*/TR1 = 1/** counter a timer to start work*/ticker = 1/* Allow Serial Port receiver* /
Platform: | Size: 51200 | Author: rty | Hits:

[Windows Develop] hostdebugger

Description: /*串行口操作模式1：8位UART，波特率可变,11.0592晶振*/ TMOD = 0x20 /*定时器*计数器1的操作模式为2*/ PCON = 0x80|PCON /*SMOD 置1*/ TH1 = 0xfd /*定时器1的重装载值，此时若SMOD=0，9.6K SMOD=1，19.2K*/ TR1 = 1 /*定时器*计数器1开始工作*/ REN = 1 /*允许串行口接收*/-/* serial port mode 1:8 bit UART, variable baud rate, crystal* 11.0592/TMOD = 0x20/** timer counter a mode of operation for 2*/P CON = 0x80 | PCON/* 1* SMOD home/0xfd TH1 =/* Incorporation of a timer contains the value at this time if SMOD = 0,9.6 SMOD K = 1, 19.2K*/TR1 = 1/** counter a timer to start work*/ticker = 1/* Allow Serial Port receiver* /
Platform: | Size: 65536 | Author: rty | Hits:

[SCM] Bit-bang_serial

Description: These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful * for performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.- These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful * for performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.
Platform: | Size: 1024 | Author: 陳大慶 | Hits:

[VHDL-FPGA-Verilog] UART_ise7_bak

Description: 用FPGA 实现全双工异步串口（UART），与PC 机通信。1 位起始位；8 位数据位；一个停止位；无校验位；波特率为2400、4800、9600、11520 任选或可变（可用按键控制波特率模式）。-using FPGA full-duplex asynchronous serial port (UART), and PC communication. An initiation; 8 data spaces; One-stop; No Parity; Baud Rate for 2400,4800,9600, 11520 optional or variable (baud rate can be used to control keypad mode).
Platform: | Size: 32768 | Author: lee | Hits:

[VHDL-FPGA-Verilog] uartverlog

Description: 占用资源少的verilog HDL uart接口；采用固定波特率115200，可以修改程序中的分频来修改波特率，模式为1个启始位，8位数据位，1个停止位；带1字节缓存；当缓存空时输出空信号-Occupy fewer resources verilog HDL uart interface adopted a fixed baud rate of 115200, can modify the procedure to modify the baud rate frequency, the model of a start bit, 8 data bits, 1 stop bit with one word section of the cache when the cache empty space-time output signal
Platform: | Size: 2048 | Author: 张诚 | Hits:

[VHDL-FPGA-Verilog] VHDL-XILINX-EXAMPLE26

Description: [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现ADC0809的采样电路设计][15--DMA方式A/D采样控制电路设计][16--硬件电子琴][17--乐曲自动演奏][18--秒表][19--移位相加8位硬件乘法器][20--VGA图像显示控制器(彩条)][21--VGA图像显示控制器][22--等精度频率计][23--模拟波形发生器][24--模拟示波器][25--通用异步收发器(UART)][26--8位CPU设计(COP2000)]
Platform: | Size: 3687424 | Author: hawd | Hits:

[Com Port] UART

Description: 用于串口通信的接收与发送(一次可传8位数据),程序比较简单,适合初学者参考.-Serial communication for receiving and sending (one 8-bit data be transmitted), the procedure is relatively simple, suitable for beginners reference.
Platform: | Size: 231424 | Author: 何林军 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。-Using FPGA to achieve the RS232 asynchronous serial communication, the language used is VHDL, In addition, I also welcome the exchange of learning Verilog, according to RS232 asynchronous serial communication to the frame format, in the FPGA module used to send each frame format : the beginning of a bit+ 8-bit data bit+ 1 bit odd parity bit+ 1 bit stop bit, baud rate for 2400. By setting the baud rate can be calculated at the frequency coefficient, the specific algorithm for the sub-frequency coefficient X = CLK/(BOUND* 2).
Platform: | Size: 1024 | Author: saibei007 | Hits:

[VHDL-FPGA-Verilog] transfer_1

Description: EDA实验--UART串口实验：UART 主要有由数据总线接口、控制逻辑、波特率发生器、发送部分和接收部分等组成。UART 发送器 --- 发送器每隔16 个CLK16 时钟周期输出1 位，次序遵循1位起始位、8位数据位（假定数据位为8位）、1位校验位（可选）、1位停止位。 UART 接收器 --- 串行数据帧和接收时钟是异步的，发送来的数据由逻辑1 变为逻辑0 可以视为一个数据帧的开始。接收器先要捕捉起始位，确定rxd 输入由1 到0，逻辑0 要8 个CLK16 时钟周期，才是正常的起始位，然后在每隔16 个CLK16 时钟周期采样接收数据，移位输入接收移位寄存器rsr，最后输出数据dout。还要输出一个数据接收标志信号标志数据接收完。 波特率发生器 --- UART 的接收和发送是按照相同的波特率进行收发的。波特率发生器产生的时钟频率不是波特率时钟频率，而是波特率时钟频率的16 倍，目的是为在接收时进行精确地采样，以提出异步的串行数据。 --- 根据给定的晶振时钟和要求的波特率算出波特率分频数。
Platform: | Size: 2048 | Author: 黄龙 | Hits:

[e-language] yi-pc-src

Description: 串口通讯实例-PC端易语言原码配合ASM UART COMMUNICATION -Serial Communication Example-PC-side code with the original language easy to ASM UART COMMUNICATION
Platform: | Size: 7168 | Author: 龙奇文 | Hits:

[SCM] chip1

Description: VB遥控播放器红外遥控解码 #include <regX52.h> #define c(x) (x*110592/120000) sbit Ir_Pin=P3^2 sbit beep=P2^1 //sbit RELAY=P2^0 #define INBUF_LEN 4 //数据长度 unsigned char inbuf1[INBUF_LEN]={ 0 , 0 , 0 , 0 } //发送缓冲区 unsigned char inbuf2[50] //接收缓冲区 unsigned char count3 void init_serialcomm( void ) { SCON = 0x50 //SCON: serail mode 1, 8-bit UART, enable ucvr T2CON=0x30 TH2=0x00 TL2=0x00 RCAP2H=0xFF RCAP2L=0xDC TR2=1 } //向串口发送一个字符 void send_char_com( unsigned char ch) { SBUF=ch while (TI== 0 ) TI= 0-VB player remote control infrared remote control decoder# Include <regX52.h># Define c (x) (x* 110592/120000) sbit Ir_Pin = P3 ^ 2 sbit beep = P2 ^ 1// sbit RELAY = P2 ^ 0# define INBUF_LEN 4// data length unsigned char inbuf1 [INBUF_LEN] = (0, 0, 0, 0)// Send buffer unsigned char inbuf2 [50]// receive buffer unsigned char count3 void init_serialcomm (void) ( SCON = 0x50// SCON: serail mode 1, 8-bit UART, enable ucvrT2CON = 0x30 TH2 = 0x00 TL2 = 0x00 RCAP2H = 0xFF RCAP2L = 0xDC TR2 = 1)// to send a serial character void send_char_com (unsigned char ch ) (SBUF = ch while (TI == 0) TI = 0
Platform: | Size: 12667904 | Author: 微微 | Hits:

[VHDL-FPGA-Verilog] UART_for_FPGArar

Description: it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]-it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
Platform: | Size: 5120 | Author: yasir ateeq | Hits:

[VHDL-FPGA-Verilog] UART

Description: 自己实用Verilog编写的UART程序，1位开始位，8位数据位，1位停止位，本测试程序配置完管脚后，实用串口大师发送数据，则返回数据为发送数据+1-Verilog prepared their own UART practical procedures to start a bit, 8 data bits, 1 stop bit, the test procedure End pin configuration, the utility serial Master to send data, send data back data+1
Platform: | Size: 253952 | Author: 张键 | Hits:

[Other Embeded program] UART

Description: 主芯片：Actel的FPGA030,Verilog语言,串口发送和接收的例程，开发环境：LiberoIDE 8.5-The main chip: Actel' s FPGA030, Verilog language, the serial port to send and receive routines, development environment: LiberoIDE 8.5
Platform: | Size: 285696 | Author: grqd | Hits:

[LabView] 串口保存文件1

Description: 串口通信 波特率9600 数据位8 停止位1(Serial communication)
Platform: | Size: 18432 | Author: 梦琪~ | Hits:

[SCM] 8，ATK-USB-UART模块

Description: ATK-USB-UART模块，代码带有注释，适合新手学习使用(Atk-usb-uart module, code with comments, suitable for novice learning)
Platform: | Size: 51723264 | Author: Lanr3457 | Hits:

[Other Embeded program] NRF24LE1串口和无线可用2017.8.3

Description: 电脑通过串口给1号NRF24LE1发指令，1号NEF24LE1通过无线控制2号NRF24LE1，使电机转动(The computer sends a command to NRF24LE1 via serial port, and NEF24LE1, no. 1, makes the motor rotate through wireless control no. 2 NRF24LE1.)
Platform: | Size: 427008 | Author: 梦醉天宇 | Hits:
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