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[VHDL-FPGA-Verilog] usb1.1_Verilog

Description: usb1.1的设备控制器IP核，是用verilog硬件描述语言写的-USB1.1 IP core for device control, written with hardware describing language of Verilog.
Platform: | Size: 131072 | Author: 李恒 | Hits:

[Communication] 基于USB-ATA接口的海量存储器的设计与实现

Description: 介绍了一种基于通用可编程接口的通用串行总线-高级技术配件解决方案，将普通硬盘转化为Usb Mass Storage.-introduces a general programmable interface based on the Universal Serial Bus-senior technical accessories solution that will drive into ordinary Usb Mass Storage.
Platform: | Size: 86016 | Author: 蔡明 | Hits:

[VHDL-FPGA-Verilog] usb_funct

Description: usb1.0的核，有详细的usb核的设计源码，用verilog语言编写，同时附有相关的设计文档，质量不错-usb1.0 nuclear, nuclear usb detailed design source, using Verilog language, along with documents related to the design, quality good
Platform: | Size: 214016 | Author: | Hits:

[Com Port] usb_ctr

Description: usb的verilog 代码。对理解usb的原理有很大帮助，并可以在nc环境下仿真。-usb the Verilog code. Usb to understand the principle is very helpful, and to be nc simulation environment.
Platform: | Size: 53248 | Author: hongbo | Hits:

[USB develop] USB2_chip

Description: USB2.0 chip的一部分verilog源码。opencore上下的，还比较好用:)-USB2.0 chip part of Verilog source. Opencore ish, but also better quality :)
Platform: | Size: 35840 | Author: 戴鹏 | Hits:

[USB develop] Usb_RTL(VHDL_Verilog)

Description: USBRTL电路的VHDL和Verilog代码-USBRTL Circuit VHDL and Verilog code
Platform: | Size: 268288 | Author: 戴鹏 | Hits:

[VHDL-FPGA-Verilog] usb1.1phy

Description: USB 1.1 PHY的代码，verilog语言 USB 1.1 PHY的代码，verilog语言-USB 1.1 PHY code, verilog language USB 1.1 PHY code, verilog language
Platform: | Size: 8192 | Author: william | Hits:

[VHDL-FPGA-Verilog] USB2.0IP_core_Verilog

Description: 完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents
Platform: | Size: 206848 | Author: 张清平 | Hits:

[ELanguage] usb_funct

Description: USB接口的VHDL源码，支持Verilog HDL程序-USB VHDL source code, supports Verilog HDL procedures
Platform: | Size: 230400 | Author: 王森 | Hits:

[VHDL-FPGA-Verilog] usb_phy

Description: umti协议中的usb1.1的verilog原文件，可公实现usb2.0做参考-umti the agreement usb1.1 verilog the original documents, the public can refer to achieve usb2.0
Platform: | Size: 10240 | Author: liuzefu | Hits:

[USB develop] usb

Description: 实现了USB接口。介绍了如何使用VERILOG语言实现USB的程序设计。-Realize the USB interface. Introduce how to use the Verilog language programming USB realize.
Platform: | Size: 140288 | Author: xiexiao | Hits:

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[VHDL-FPGA-Verilog] usb1.1_Verilog

[Communication] 基于USB-ATA接口的海量存储器的设计与实现

[VHDL-FPGA-Verilog] usb_funct

[Com Port] usb_ctr

[USB develop] USB2_chip

[USB develop] Usb_RTL(VHDL_Verilog)

[VHDL-FPGA-Verilog] usb1.1phy

[VHDL-FPGA-Verilog] USB2.0IP_core_Verilog

[ELanguage] usb_funct

[VHDL-FPGA-Verilog] usb_phy

[USB develop] usb

[VHDL-FPGA-Verilog] 8051core-Verilog

[Applications] Asynchronous_slavefifo_wr

[VHDL-FPGA-Verilog] USB

[source in ebook] USBverilog

[VHDL-FPGA-Verilog] USB

[USB develop] pci-verilog

[Communication] verilog

[VHDL-FPGA-Verilog] USB_Interface

[VHDL-FPGA-Verilog] verilog-usb--protel-design

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