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[Program doc] PS2_Procotl_kebard_mouse

Description: 该文详细介绍PS/2协议，和基于该协议的鼠标和键盘通信规范-The article detailed PS/2 agreement and the agreement on the mouse and keyboard communication specifications. .
Platform: | Size: 617472 | Author: chesnu | Hits:

[VHDL-FPGA-Verilog] S3Demo

Description: 用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码，基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS/2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
Platform: | Size: 291840 | Author: 计算机 | Hits:

[Embeded-SCM Develop] EXPT12_11_Ps2Key

Description: 基于fpga和sopc的用VHDL语言编写的EDA的PS/2鼠标键盘控制模块-FPGA and SOPC based on the use of VHDL language EDA s PS/2 mouse keyboard control module
Platform: | Size: 33792 | Author: 多幅撒 | Hits:

[Embeded-SCM Develop] EXPT12_12_VGAgame

Description: 基于fpga和sopc的用VHDL语言编写的EDA的PS/2鼠标与VGA控制模块-FPGA and SOPC based on the use of VHDL language EDA s PS/2 mouse and VGA control module
Platform: | Size: 29696 | Author: 多幅撒 | Hits:

[Embeded-SCM Develop] EP1C6_12_12_VGAgame

Description: 基于fpga和sopc的用VHDL语言编写的EDA的PS/2和VGA控制显示控制器-FPGA and SOPC based on the use of VHDL language EDA s PS/2 and VGA display controller to control
Platform: | Size: 27648 | Author: 多幅撒 | Hits:

[VHDL-FPGA-Verilog] PS2_LCD

Description: ps/2键盘输入，通过led显示ascii码 2、稍等1s可以在lcd上显示输入的字符
Platform: | Size: 344064 | Author: 张海风 | Hits:

[Software Engineering] ps2_ipcore_design

Description: 电子测量技术 ELECTR0NIC MEASI瓜EMENT TECHN0L0GY 第29卷第3期 2006年6月 PS／2设备接口IP核设计 王 豪黄启俊常 胜 (武汉大学物理学院微电子与固体电子学实验室武汉430072) 摘要：用Verilog硬件描述语言实现了PS／2设备接口的II)核设计，详细描述了II)核的结构划分和各模块的 设计思想，并在FPGA上进行验证。结果表明此 核功能正确，可以方便地在SOPC系统中复用。-Electronic Measurement Technology ELECTR0NIC MEASI melon EMENT TECHN0L0GY Vol 29 No. 3 June 2006 PS/2 device interface IP core design黄启俊Changsheng WANG Hao (School of Physics, Wuhan University Microelectronics and Solid State Electronics Laboratory, Wuhan 430072) Abstract: Verilog hardware description language to achieve a PS/2 device interface of II) of nuclear design, described in detail II) the structure of nuclear division and the module
Platform: | Size: 126976 | Author: Morgan | Hits:

[SCM] ps2_lcd

Description: 1、ps/2键盘输入，通过led显示ascii码 2、稍等1s可以在lcd上显示输入的字符 3、其中键盘上的backspce键是用来清屏的 4、当lcd上显示满字符时，在按下按键自动清屏，从第一行显示。-1, ps/2 keyboard input, through the led display ascii code 2, wait 1s in the lcd display characters input 3, which backspce keys on the keyboard was required to settle the screen 4, when the lcd display full of characters, the press the button automatically Qing-ping, from the first line of display.
Platform: | Size: 9216 | Author: yuan | Hits:

[SCM] ps2_rs232

Description: 本实验实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上（sscom32.exe）； 并在数据接收区显示接收到的字符。 串口调试终端的设置：波特率115200，一个停止位，无校验位。 -Realize this experiment, PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal (sscom32.exe) and data receiving display received characters. Serial debug terminal settings: 115200 baud rate, one stop bit, no parity bit.
Platform: | Size: 196608 | Author: yuan | Hits:

[VHDL-FPGA-Verilog] RS232

Description: 本实验实现PS/2接口与RS-232接口的数据传输， PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上（sscom32.exe）； 并在数据接收区显示接收到的字符。 串口调试终端的设置：波特率115200，一个停止位，无校验位。-Realize this experiment, PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal (sscom32.exe) and data receiving display received characters. Serial debug terminal settings: 115200 baud rate, one stop bit, no parity bit.
Platform: | Size: 730112 | Author: 李华 | Hits:

[VHDL-FPGA-Verilog] ps

Description: RS(204,188)译码器的设计 异步FIFO设计 伪随即序列应用设计 CORDIC数字计算机的设计 CIC的设计 除法器的设计 加罗华域的乘法器设计-RS (204188) decoder design of asynchronous FIFO design application design sequence was pseudo-CORDIC design of digital computer design CIC divider design Le Hua domain multiplier design
Platform: | Size: 48128 | Author: 苏晓东 | Hits:

[VHDL-FPGA-Verilog] LPT

Description: 实现开漏输出的并口，支持3.3V或5V，支持FPGA 的PS 配置功能。8位配置数据 自动移位输出，输入时钟24MHz，产生1MHz配置时钟。8位CPU数据总线接口， 11位地址总线。支持IO 的置位清除功能。-The realization of open-drain output of the parallel port, support 3.3V or 5V, support for FPGA configuration of the PS function. 8-bit configuration data automatically shift output, input clock 24MHz, resulting 1MHz clock configuration. 8-bit CPU data bus interface, address bus 11. IO-bit support for the home clearance.
Platform: | Size: 2048 | Author: tianrongcai | Hits:

[ARM-PowerPC-ColdFire-MIPS] PS2

Description: a document for ps/2 keyboard controller
Platform: | Size: 199680 | Author: ROMY | Hits:

[VHDL-FPGA-Verilog] 232

Description: 实现PS/2接口与RS-232接口的数据传输， 可以通过RS-232自动传送到主机的串口调试终端上并在数据接收区显示接收到的字符。-The realization of PS/2 port RS-232 interface with data transfer, RS-232 can be automatically sent to the host serial debug terminal and reception area in the data display received characters.
Platform: | Size: 15360 | Author: 包宰 | Hits:

[VHDL-FPGA-Verilog] ps2test

Description: PS/2键盘接口实验: 将PC键盘接入板上PS/2接口，按下键盘任意键，LED等将显示键盘传来的编码-PS/2 keyboard interface experiment: the PC keyboard, access to on-board PS/2 interface, press any key on the keyboard, LED, etc. The code will display the keyboard came
Platform: | Size: 106496 | Author: panda | Hits:

[Industry research] dfbfdvbfdbfgbfgb153351bgfb

Description: : 条形码识别，直接运行程序即可； pdf417lib：二维条形码打印（输出为ps格式的文件），在书中第6章二维条形码打印部分有程序使用的说明； 条形码生成器源程序：生成一维条形码，直接运行程序即可； [8位数字频率计.rar] - 数字频率计~ VHDL 实现 可以实现频率的测量和现实的功能 8位 [hot.rar] - 图像分割是数字图像处理中的关键技术之一。图像分割是将图像中有意义的特征-tiaoxingma.rar]- barcode: barcode recognition, you can run the program directly pdf417lib: two-dimensional bar code printing (output ps format), in the book, Chapter 6, two-dimensional bar code printing part of a program using the instructions barcode generation device source: Build a one-dimensional bar code, you can run the program directly [8-bit digital frequency meter. rar]- digital frequency meter ~ VHDL implementation can be achieved and actual measurement of the frequency function of 8 [hot.rar]- Image Segmentation digital image processing of the key technologies. Image segmentation is the image characteristics of a meaningful
Platform: | Size: 1087488 | Author: ihba | Hits:

[VHDL-FPGA-Verilog] wtut_sc

Description: DCM includes a clock delay locked loop used to minimize clock skew for Spartan-3, Virtex-II, Virtex-II Pro, and Virtex-II Pro X devices. DCM synchronizes the clock signal at the feedback clock input (CLKFB) to the clock signal at the input clock (CLKIN). The locked output (LOCKED) is high when the two signals are in phase. The signals are considered to be in phase when their rising edges are within a specified time (ps) of each other.
Platform: | Size: 106496 | Author: shad | Hits:

[VHDL-FPGA-Verilog] ps2interface

Description: this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .
Platform: | Size: 5120 | Author: yasir | Hits:

[Other] VHDL_NEXYS_Example41

Description: In this example w ill interface the PS/2 port to a PS/2 keyboard, also known as an AT keyboard. The example will not apply to the newer USB keyboards, or to the older, obsolete XT keyboard. Keyboards contain their own microprocessors that continually scan the keys and then send the resulting key pressings to the host – in our case through the PS/2 port.-In this example we will interface the PS/2 port to a PS/2 keyboard, also known as an AT keyboard. The example will not apply to the newer USB keyboards, or to the older, obsolete XT keyboard. Keyboards contain their own microprocessors that continually scan the keys and then send the resulting key pressings to the host – in our case through the PS/2 port.
Platform: | Size: 20480 | Author: will | Hits:

[VHDL-FPGA-Verilog] ps2_mouse_interface

Description: Its referent a PS/2 Mouse code
Platform: | Size: 28672 | Author: Jesloveyou | Hits:
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