VHDL-FPGA-Verilog List Page 12

VHDL-FPGA-Verilog list

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CDCM6208_SPI Downloaded：0: cdcm6208 cofigure using SPI interface
Update : 2024-12-22 Size : 1kb Publisher : echolei
Modelsim 10.2c Downloaded：0: Crack of Modelsim 10.2c
Update : 2024-12-22 Size : 957kb Publisher : PeykanAli
2FSK调制解调的FPGA实现（VHDL） Downloaded：0: The FPGA design of 2FSK modulation and demodulation, based on the ISE platform of xinlinx, is designed with VHDL language, with design documents, welcome to learn
Update : 2024-12-22 Size : 2.35mb Publisher : 无线电之家99
AD9361 Downloaded：0: Ad9361 data and configuration parameter document
Update : 2024-12-22 Size : 17.24mb Publisher : 风之火狐
S02《Artix7修炼秘籍》MIG_DDR内存应用 Downloaded：0: Artix 7 Series FPGA MIG DDR3 Application Tutorial
Update : 2024-12-22 Size : 5.19mb Publisher : 北极徘徊
PID Downloaded：0: Using Verilog language to realize PID incremental control and output duty cycle
Update : 2024-12-22 Size : 1kb Publisher : 人生苦短98
模24计数器 Downloaded：0: Quartus II text input design and test bench of modulo 24 counter
Update : 2024-12-22 Size : 2kb Publisher : 13570
国产FPGA参考设计IPCORE_UART_example_M5&M7 Downloaded：1: The IP provides two kinds of simplified interface connected to EMIF bus and AHB bus for communication with 8051 core and ARM core.The two kinds of interface are full-duplex serial communication interface.
Update : 2024-12-22 Size : 3.02mb Publisher : 空空居士
单周期CPU大作业-2020 Downloaded：1: Verilog projects cpu
Update : 2024-12-22 Size : 869kb Publisher : sast
POC Downloaded：0: It simulates the POC module which works as an I/O module in a computer system.
Update : 2024-12-22 Size : 3kb Publisher : 青空空
drsstc Downloaded：0: DRSSTC project file for SKP / PDM
Update : 2024-12-22 Size : 4kb Publisher : 氧化钙yhg
4乘4键盘扫描控制器 Downloaded：0: 1. The key value is encoded in hexadecimal, i.e. 16 keys display hexadecimal numbers respectively 0 ~ F, the corresponding relationship of keys is as follows: the top line is 0 ~ 3 from left to right, The second row is 4
Update : 2020-06-09 Size : 3.29mb Publisher : Minbadly

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